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void ARM32Common::emulate (Capstone* capstone, RDEmulateResult* result, const cs_insn* insn)
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{
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- rd_address address = ARM_PC (RDEmulateResult_GetAddress (result));
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+ rd_address address = arm_address (RDEmulateResult_GetAddress (result));
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const auto & arm = insn->detail ->arm ;
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- if (address == 0x08000110 )
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- {
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- int zzz = 0 ;
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- zzz++;
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- }
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-
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switch (insn->id )
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{
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case ARM_INS_B: {
@@ -28,26 +22,26 @@ void ARM32Common::emulate(Capstone* capstone, RDEmulateResult* result, const cs_
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case ARM_INS_BLX: {
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if (arm.operands [0 ].type != ARM_OP_IMM) return ;
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- if (ARM_IS_THUMB (arm.operands [0 ].imm ))
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- RDContext_SetAddressAssembler (capstone->context (), ARM_PC (arm.operands [0 ].imm ), capstone->endianness () == Endianness_Big ? THUMBBE_ID : THUMBLE_ID);
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+ if (arm_is_thumb (arm.operands [0 ].imm ))
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+ RDContext_SetAddressAssembler (capstone->context (), arm_address (arm.operands [0 ].imm ), capstone->endianness () == Endianness_Big ? THUMBBE_ID : THUMBLE_ID);
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else
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- RDContext_SetAddressAssembler (capstone->context (), ARM_PC (arm.operands [0 ].imm ), capstone->endianness () == Endianness_Big ? ARM32BE_ID : ARM32LE_ID);
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+ RDContext_SetAddressAssembler (capstone->context (), arm_address (arm.operands [0 ].imm ), capstone->endianness () == Endianness_Big ? ARM32BE_ID : ARM32LE_ID);
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if (arm.cc != ARM_CC_AL) {
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}
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- else RDEmulateResult_AddCall (result, ARM_PC (arm.operands [0 ].imm ));
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+ else RDEmulateResult_AddCall (result, arm_address (arm.operands [0 ].imm ));
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return ;
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}
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case ARM_INS_BL: {
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if (capstone->mode () & CS_MODE_THUMB)
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- RDContext_SetAddressAssembler (capstone->context (), ARM_PC (arm.operands [0 ].imm ), capstone->endianness () == Endianness_Big ? THUMBBE_ID : THUMBLE_ID);
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+ RDContext_SetAddressAssembler (capstone->context (), arm_address (arm.operands [0 ].imm ), capstone->endianness () == Endianness_Big ? THUMBBE_ID : THUMBLE_ID);
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else
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- RDContext_SetAddressAssembler (capstone->context (), ARM_PC (arm.operands [0 ].imm ), capstone->endianness () == Endianness_Big ? ARM32BE_ID : ARM32LE_ID);
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+ RDContext_SetAddressAssembler (capstone->context (), arm_address (arm.operands [0 ].imm ), capstone->endianness () == Endianness_Big ? ARM32BE_ID : ARM32LE_ID);
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- RDEmulateResult_AddCall (result, ARM_PC (arm.operands [0 ].imm )); return ;
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+ RDEmulateResult_AddCall (result, arm_address (arm.operands [0 ].imm )); return ;
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return ;
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}
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@@ -154,20 +148,38 @@ void ARM32Common::processOperands(Capstone* capstone, const cs_insn* insn, RDEmu
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bool ARM32Common::isMemPC (const arm_op_mem& mem) { return (mem.index == ARM_REG_INVALID) && (mem.base == ARM_REG_PC); }
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+ void ARM32Common::renderDereference (rd_location location, const RDRendererParams* rp)
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+ {
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+ auto * doc = RDContext_GetDocument (rp->context );
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+ auto flags = RDDocument_GetFlags (doc, location);
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+
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+ if (flags & AddressFlags_Pointer) {
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+ auto loc = RDDocument_Dereference (doc, location);
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+
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+ if (loc.valid ) {
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+ RDRenderer_Text (rp->renderer , " =" );
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+ RDRenderer_Reference (rp->renderer , arm_address (loc.address ));
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+ return ;
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+ }
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+ }
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+
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+ RDRenderer_Reference (rp->renderer , location);
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+ }
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+
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void ARM32Common::renderOperand (Capstone* capstone, const cs_insn* insn, const cs_arm_op& op, const RDRendererParams* rp)
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{
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const auto & arm = insn->detail ->arm ;
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switch (op.type )
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{
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case ARM_OP_MEM: {
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- if (ARM32Common::isMemPC (op.mem )) RDRenderer_Reference (rp-> renderer , ARM32Common::pc (capstone, insn) + op.mem .disp ); // [pc]
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+ if (ARM32Common::isMemPC (op.mem )) ARM32Common::renderDereference ( ARM32Common::pc (capstone, insn) + op.mem .disp , rp ); // [pc]
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else ARM32Common::renderMemory (capstone, arm, op, rp);
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break ;
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}
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+ case ARM_OP_IMM: ARM32Common::renderDereference (op.imm , rp); break ;
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case ARM_OP_REG: RDRenderer_Register (rp->renderer , capstone->regName (op.reg )); break ;
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- case ARM_OP_IMM: RDRenderer_Reference (rp->renderer , op.imm ); break ;
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case ARM_OP_FP: RDRenderer_Text (rp->renderer , " ARM_OP_FP" ); break ;
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case ARM_OP_CIMM: RDRenderer_Text (rp->renderer , " ARM_OP_CIMM" ); break ;
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case ARM_OP_PIMM: RDRenderer_Text (rp->renderer , " ARM_OP_PIMM" ); break ;
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