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arm64: dts: xilinx: Clean up and changed Spaces to Tabs
Signed-off-by: JRabacca <[email protected]>
1 parent f5935f7 commit d432ae8

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2 files changed

+51
-52
lines changed

2 files changed

+51
-52
lines changed

arch/arm64/boot/dts/xilinx/adi-ad9467-fmc-250ebz.dtsi

Lines changed: 9 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -14,37 +14,36 @@
1414
};
1515

1616
&fmc_spi {
17-
status = "okay";
17+
status = "okay";
1818
adc_ad9467: ad9467@0 {
1919
compatible = "adi,ad9467";
2020
reg = <0>;
2121

2222
spi-max-frequency = <10000000>;
2323
adi,spi-3wire-enable;
24-
25-
// clocks = <&clk_ad9517 3>;
24+
2625
clocks = <&ad9517_ref_clk>;
2726
clock-names = "adc_clk";
28-
27+
2928
#address-cells = <1>;
3029
#size-cells = <0>;
3130
};
32-
31+
3332
clk_ad9517: ad9517@1 {
3433
compatible = "adi,ad9517-4";
3534
reg = <1>;
36-
35+
3736
spi-max-frequency = <10000000>;
3837
adi,spi-3wire-enable;
39-
38+
4039
clocks = <&ad9517_ref_clk>, <&ad9517_ref_clk>;
4140
clock-names = "refclk", "clkin";
42-
41+
4342
clock-output-names = "out0", "out1", "out2", "out3", "out4", "out5", "out6", "out7";
4443
#clock-cells = <1>;
45-
44+
4645
firmware = "ad9467_intbypass_ad9517.stp";
47-
46+
4847
#address-cells = <1>;
4948
#size-cells = <0>;
5049
};

arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9467-fmc-250ebz.dts

Lines changed: 42 additions & 42 deletions
Original file line numberDiff line numberDiff line change
@@ -16,55 +16,55 @@
1616
#include <dt-bindings/interrupt-controller/irq.h>
1717

1818
/ {
19-
fpga_axi: fpga-axi@0 {
20-
interrupt-parent = <&gic>;
21-
compatible = "simple-bus";
22-
#address-cells = <0x1>;
23-
#size-cells = <0x1>;
24-
ranges = <0 0 0 0xffffffff>;
25-
26-
rx_dma: dma-controller@84A30000 {
27-
compatible = "adi,axi-dmac-1.00.a";
28-
reg = <0x84A30000 0x10000>;
29-
#dma-cells = <1>;
30-
interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
31-
clocks = <&zynqmp_clk 71>;
32-
};
33-
34-
cf_ad9467_core_0: cf-ad9467-core-lpc@84A00000 {
35-
compatible = "adi,axi-adc-10.0.a", "adi,axi-ad9467-1.0";
36-
reg = <0x84A00000 0x10000>;
37-
dmas = <&rx_dma 0>;
38-
dma-names = "rx";
39-
40-
spibus-connected = <&adc_ad9467>;
41-
};
42-
43-
axi_sysid_0: axi-sysid-0@85000000 {
44-
compatible = "adi,axi-sysid-1.00.a";
45-
reg = <0x85000000 0x10000>;
46-
};
47-
};
19+
fpga_axi: fpga-axi@0 {
20+
interrupt-parent = <&gic>;
21+
compatible = "simple-bus";
22+
#address-cells = <0x1>;
23+
#size-cells = <0x1>;
24+
ranges = <0 0 0 0xffffffff>;
25+
26+
rx_dma: dma-controller@84A30000 {
27+
compatible = "adi,axi-dmac-1.00.a";
28+
reg = <0x84A30000 0x10000>;
29+
#dma-cells = <1>;
30+
interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
31+
clocks = <&zynqmp_clk 71>;
32+
};
33+
34+
cf_ad9467_core_0: cf-ad9467-core-lpc@84A00000 {
35+
compatible = "adi,axi-adc-10.0.a", "adi,axi-ad9467-1.0";
36+
reg = <0x84A00000 0x10000>;
37+
dmas = <&rx_dma 0>;
38+
dma-names = "rx";
39+
40+
spibus-connected = <&adc_ad9467>;
41+
};
42+
43+
axi_sysid_0: axi-sysid-0@85000000 {
44+
compatible = "adi,axi-sysid-1.00.a";
45+
reg = <0x85000000 0x10000>;
46+
};
47+
};
4848
};
4949

5050
&spi0 {
5151
status = "okay";
5252
};
5353

5454
&i2c1 {
55-
i2c-mux@75 {
56-
i2c@0 {
57-
#address-cells = <1>;
58-
#size-cells = <0>;
59-
reg = <0>;
60-
61-
eeprom@50 {
62-
compatible = "at24,24c02";
63-
reg = <0x50>;
64-
};
65-
66-
};
67-
};
55+
i2c-mux@75 {
56+
i2c@0 {
57+
#address-cells = <1>;
58+
#size-cells = <0>;
59+
reg = <0>;
60+
61+
eeprom@50 {
62+
compatible = "at24,24c02";
63+
reg = <0x50>;
64+
};
65+
66+
};
67+
};
6868
};
6969

7070
#define fmc_spi spi0

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