@@ -76,68 +76,44 @@ void OPENSSL_cpuid_setup(void) {
7676 // NEON (Advanced SIMD) is mandatory on all ARMv8-A cores
7777 OPENSSL_armcap_P |= ARMV7_NEON ;
7878
79- // Check for AES support across all cores
80- // NetBSD uses __SHIFTOUT() to extract bit fields from register values
81- if ( __SHIFTOUT ( common_aa64isar0 , ID_AA64ISAR0_EL1_AES ) >= ID_AA64ISAR0_EL1_AES_AES ) {
82- OPENSSL_armcap_P |= ARMV8_AES ;
83- }
79+ // Inspired by the implementation of `cpu_identify2` here:
80+ // https://github.com/ NetBSD/src/blob/62c785e59d064070166dab5d2a4492055effba89/sys/arch/aarch64/aarch64/cpu.c#L363
81+
82+ // Macros below found in "armreg.h"
83+ // https://github.com/NetBSD/src/blame/62c785e59d064070166dab5d2a4492055effba89/sys/arch/aarch64/include/armreg.h
8484
85- // Check for PMULL (polynomial multiply) support across all cores
86- if (__SHIFTOUT (common_aa64isar0 , ID_AA64ISAR0_EL1_AES ) >= ID_AA64ISAR0_EL1_AES_PMUL ) {
87- OPENSSL_armcap_P |= ARMV8_PMULL ;
85+ // Check for AES and PMULL
86+ const uint64_t aes_detection = __SHIFTOUT (common_aa64isar0 , ID_AA64ISAR0_EL1_AES );
87+ if (aes_detection >= ID_AA64ISAR0_EL1_AES_AES ) {
88+ OPENSSL_armcap_P |= ARMV8_AES ;
89+ }
90+ if (aes_detection >= ID_AA64ISAR0_EL1_AES_PMUL ) {
91+ OPENSSL_armcap_P |= ARMV8_PMULL ;
8892 }
8993
9094 // Check for SHA1 support across all cores
91- #ifdef ID_AA64ISAR0_EL1_SHA1_SHA1CPMHSU
9295 if (__SHIFTOUT (common_aa64isar0 , ID_AA64ISAR0_EL1_SHA1 ) >= ID_AA64ISAR0_EL1_SHA1_SHA1CPMHSU ) {
93- OPENSSL_armcap_P |= ARMV8_SHA1 ;
94- }
95- #else
96- // Older NetBSD versions - check if field is non-zero
97- if (__SHIFTOUT (common_aa64isar0 , ID_AA64ISAR0_EL1_SHA1 ) > ID_AA64ISAR0_EL1_SHA1_NONE ) {
98- OPENSSL_armcap_P |= ARMV8_SHA1 ;
99- }
100- #endif
96+ OPENSSL_armcap_P |= ARMV8_SHA1 ;
97+ }
10198
10299 // Check for SHA256 support across all cores
103- #ifdef ID_AA64ISAR0_EL1_SHA2_SHA256HSU
104- if (__SHIFTOUT (common_aa64isar0 , ID_AA64ISAR0_EL1_SHA2 ) >= ID_AA64ISAR0_EL1_SHA2_SHA256HSU ) {
105- OPENSSL_armcap_P |= ARMV8_SHA256 ;
106- }
107- #else
108- // Older NetBSD versions - check if field is non-zero
109- if (__SHIFTOUT (common_aa64isar0 , ID_AA64ISAR0_EL1_SHA2 ) > ID_AA64ISAR0_EL1_SHA2_NONE ) {
110- OPENSSL_armcap_P |= ARMV8_SHA256 ;
111- }
112- #endif
113-
114- // Check for SHA512 support across all cores
115- #ifdef ID_AA64ISAR0_EL1_SHA2_SHA512
116- if (__SHIFTOUT (common_aa64isar0 , ID_AA64ISAR0_EL1_SHA2 ) >= ID_AA64ISAR0_EL1_SHA2_SHA512 ) {
100+ const uint64_t sha2_detection = __SHIFTOUT (common_aa64isar0 , ID_AA64ISAR0_EL1_SHA2 );
101+ if (sha2_detection >= ID_AA64ISAR0_EL1_SHA2_SHA256HSU ) {
102+ OPENSSL_armcap_P |= ARMV8_SHA256 ;
103+ }
104+ if (sha2_detection >= ID_AA64ISAR0_EL1_SHA2_SHA512HSU ) {
117105 OPENSSL_armcap_P |= ARMV8_SHA512 ;
118106 }
119- #endif
120-
121- // Check for SHA3 support across all cores
122- #ifdef ID_AA64ISAR0_EL1_SHA3_SHA3
123- if (__SHIFTOUT (common_aa64isar0 , ID_AA64ISAR0_EL1_SHA3 ) >= ID_AA64ISAR0_EL1_SHA3_SHA3 ) {
124- OPENSSL_armcap_P |= ARMV8_SHA3 ;
125- }
126- #endif
127107
128108 // Check for RNG (RNDR/RNDRRS) support across all cores
129- #ifdef ID_AA64ISAR0_EL1_RNDR_RNDRRS
130109 if (__SHIFTOUT (common_aa64isar0 , ID_AA64ISAR0_EL1_RNDR ) >= ID_AA64ISAR0_EL1_RNDR_RNDRRS ) {
131110 OPENSSL_armcap_P |= ARMV8_RNG ;
132111 }
133- #endif
134112
135113 // Check for DIT (Data Independent Timing) support across all cores
136- #ifdef ID_AA64PFR0_EL1_DIT_IMPL
137114 if (__SHIFTOUT (common_aa64pfr0 , ID_AA64PFR0_EL1_DIT ) >= ID_AA64PFR0_EL1_DIT_IMPL ) {
138115 OPENSSL_armcap_P |= (ARMV8_DIT | ARMV8_DIT_ALLOWED );
139116 }
140- #endif
141117}
142118
143119#endif // OPENSSL_AARCH64 && OPENSSL_NETBSD && !OPENSSL_STATIC_ARMCAP
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