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Add cpu_aarch64_netbsd
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.github/workflows/cross-test.yml

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@@ -152,7 +152,10 @@ jobs:
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with:
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release: "10.1"
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arch: ${{ matrix.arch }}
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envs: 'MYTOKEN MYTOKEN2'
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nat: |
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"8080": "80"
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"8443": "443"
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udp:"8081": "80"
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usesh: true
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run: |
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/usr/sbin/pkg_add cmake

crypto/fipsmodule/bcm.c

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#include "cpucap/cpu_aarch64_apple.c"
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#include "cpucap/cpu_aarch64_freebsd.c"
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#include "cpucap/cpu_aarch64_linux.c"
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#include "cpucap/cpu_aarch64_netbsd.c"
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#include "cpucap/cpu_aarch64_openbsd.c"
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#include "cpucap/cpu_aarch64_win.c"
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#include "cpucap/cpu_arm_freebsd.c"
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// Copyright Amazon.com, Inc. or its affiliates. All Rights Reserved.
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// SPDX-License-Identifier: Apache-2.0 OR ISC
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#include <openssl/cpu.h>
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#if defined(OPENSSL_AARCH64) && defined(OPENSSL_NETBSD) && \
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!defined(OPENSSL_STATIC_ARMCAP)
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#include <aarch64/armreg.h>
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#include <stddef.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <sys/param.h>
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#include <sys/sysctl.h>
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#include <openssl/arm_arch.h>
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#include "internal.h"
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void OPENSSL_cpuid_setup(void) {
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// Use sysctl to read ID_AA64ISAR0_EL1 register
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size_t len = sizeof(uint64_t);
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uint64_t id_aa64isar0 = 0;
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// Try to read the aarch64 instruction set attribute register
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if (sysctlbyname("machdep.id_aa64isar0", &id_aa64isar0, &len, NULL, 0) < 0) {
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return;
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}
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OPENSSL_armcap_P |= ARMV7_NEON; // NEON is baseline on AArch64
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if (ID_AA64ISAR0_EL1_AES(id_aa64isar0) >= ID_AA64ISAR0_EL1_AES_AES) {
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OPENSSL_armcap_P |= ARMV8_AES;
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}
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if (ID_AA64ISAR0_EL1_AES(id_aa64isar0) >= ID_AA64ISAR0_EL1_AES_PMUL) {
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OPENSSL_armcap_P |= ARMV8_PMULL;
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}
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if (ID_AA64ISAR0_EL1_SHA1(id_aa64isar0) >= ID_AA64ISAR0_EL1_SHA1_SHA1) {
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OPENSSL_armcap_P |= ARMV8_SHA1;
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}
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if (ID_AA64ISAR0_EL1_SHA2(id_aa64isar0) >= ID_AA64ISAR0_EL1_SHA2_SHA256) {
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OPENSSL_armcap_P |= ARMV8_SHA256;
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}
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if (ID_AA64ISAR0_EL1_SHA2(id_aa64isar0) >= ID_AA64ISAR0_EL1_SHA2_SHA512) {
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OPENSSL_armcap_P |= ARMV8_SHA512;
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}
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}
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#endif // OPENSSL_AARCH64 && OPENSSL_NETBSD && !OPENSSL_STATIC_ARMCAP

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