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Add h563
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‎templates/lfs/nucleo-h563zi/Makefile‎

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CFLAGS = -W -Wall -Wextra -Werror -Wundef -Wshadow -Wdouble-promotion
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CFLAGS += -Wformat-truncation -fno-common -Wno-sign-conversion
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#CFLAGS += -Wconversion # For LFS
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CFLAGS += -Wno-error=shadow # For LFS
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CFLAGS += -g3 -Os -ffunction-sections -fdata-sections
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CFLAGS += -I. -Imongoose -Icmsis_core/CMSIS/Core/Include -Icmsis_h5/Include
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CFLAGS += -mcpu=cortex-m33 -mthumb -mfpu=fpv5-sp-d16 -mfloat-abi=hard $(CFLAGS_EXTRA)
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LDFLAGS ?= -Tlink.ld -nostdlib -nostartfiles --specs nano.specs -lc -lgcc -Wl,--gc-sections -Wl,-Map=$@.map
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SOURCES = main.c syscalls.c
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SOURCES += retarget_lfs.c littlefs/lfs.c littlefs/lfs_util.c
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SOURCES += cmsis_h5/Source/Templates/gcc/startup_stm32h563xx.s
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all build: firmware.bin
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firmware.bin: firmware.elf
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arm-none-eabi-objcopy -O binary $< $@
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arm-none-eabi-size --format=berkeley $<
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firmware.elf: cmsis_core cmsis_h5 littlefs $(SOURCES) $(wildcard *.h) link.ld Makefile
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arm-none-eabi-gcc $(SOURCES) $(CFLAGS) $(LDFLAGS) -o $@
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flash: firmware.bin
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STM32_Programmer_CLI -c port=swd -e all -w $< 0x8000000 -hardRst
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cmsis_core:
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git clone -q -c advice.detachedHead=false --depth 1 -b 5.9.0 https://github.com/ARM-software/CMSIS_5 $@
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cmsis_h5:
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git clone -q -c advice.detachedHead=false --depth 1 -b v1.2.0 https://github.com/STMicroelectronics/cmsis_device_h5 $@
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littlefs/lfs.c: littlefs
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littlefs:
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git clone -q -c advice.detachedHead=false --depth 1 -b v2.6.1 https://github.com/littlefs-project/littlefs $@
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clean:
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rm -rf firmware.* cmsis_* littlefs

‎templates/lfs/nucleo-h563zi/flash_stm32h5.h‎

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// Copyright (c) 2022-2025 Cesanta Software Limited
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// SPDX-License-Identifier: GPL-2.0-only or commercial
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#pragma once
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#define FLASH_START_ADDR 0x8000000
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#define FLASH_TOTAL_SIZE (2 * 1024 * 1024) // Defined in the CMSIS header
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#define FLASH_BLOCK_SIZE 8192 // FLash block size in bytes
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#define FLASH_ALIGN_SIZE 16
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#define MG_REG(x) ((volatile uint32_t *) (x))[0]
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#define MG_BIT(x) (((uint32_t) 1U) << (x))
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#define MG_SET_BITS(R, CLRMASK, SETMASK) (R) = ((R) & ~(CLRMASK)) | (SETMASK)
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#ifndef MG_DEBUG
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#define MG_DEBUG(x) // printf x; putchar('\n')
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#define MG_ERROR(x) // printf x; putchar('\n')
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#endif
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#if defined(__GNUC__)
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#define MG_ARM_DISABLE_IRQ() asm volatile("cpsid i" : : : "memory")
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#define MG_ARM_ENABLE_IRQ() asm volatile("cpsie i" : : : "memory")
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#elif defined(__CCRH__)
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#define MG_RH850_DISABLE_IRQ() __DI()
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#define MG_RH850_ENABLE_IRQ() __EI()
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#else
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#define MG_ARM_DISABLE_IRQ()
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#define MG_ARM_ENABLE_IRQ()
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#endif
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#define MG_FLASH_CONTROLLER_ADDR 0x40022000 // Flash controller base address
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#define FLASH_KEYR (MG_FLASH_CONTROLLER_ADDR + 0x4) // See RM0481 7.11
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#define FLASH_OPTKEYR (MG_FLASH_CONTROLLER_ADDR + 0xc)
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#define FLASH_OPTCR (MG_FLASH_CONTROLLER_ADDR + 0x1c)
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#define FLASH_NSSR (MG_FLASH_CONTROLLER_ADDR + 0x20)
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#define FLASH_NSCR (MG_FLASH_CONTROLLER_ADDR + 0x28)
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#define FLASH_NSCCR (MG_FLASH_CONTROLLER_ADDR + 0x30)
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#define FLASH_OPTSR_CUR (MG_FLASH_CONTROLLER_ADDR + 0x50)
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#define FLASH_OPTSR_PRG (MG_FLASH_CONTROLLER_ADDR + 0x54)
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static inline void flash_unlock(void) {
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if (MG_REG(FLASH_NSCR) & MG_BIT(0)) {
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MG_REG(FLASH_KEYR) = 0x45670123;
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MG_REG(FLASH_KEYR) = 0xcdef89ab;
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MG_REG(FLASH_OPTKEYR) = 0x08192a3b;
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MG_REG(FLASH_OPTKEYR) = 0x4c5d6e7f;
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}
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}
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static inline int flash_page_start(volatile uint32_t *dst) {
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char *base = (char *) FLASH_START_ADDR, *end = base + FLASH_TOTAL_SIZE;
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volatile char *p = (char *) dst;
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return p >= base && p < end && ((p - base) % FLASH_BLOCK_SIZE) == 0;
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}
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static inline bool flash_is_err(void) {
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return MG_REG(FLASH_NSSR) & ((MG_BIT(8) - 1) << 17); // RM0481 7.11.9
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}
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static inline void flash_wait(void) {
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while ((MG_REG(FLASH_NSSR) & MG_BIT(0)) &&
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(MG_REG(FLASH_NSSR) & MG_BIT(16)) == 0) {
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(void) 0;
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}
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}
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static inline void flash_clear_err(void) {
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flash_wait(); // Wait until ready
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MG_REG(FLASH_NSCCR) = ((MG_BIT(9) - 1) << 16U); // Clear all errors
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}
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static inline bool flash_bank_is_swapped(void) {
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return MG_REG(FLASH_OPTCR) & MG_BIT(31); // RM0481 7.11.8
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}
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static inline bool flash_erase_block(void *location) {
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bool ok = false;
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if (flash_page_start(location) == false) {
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MG_ERROR(("%p is not on a sector boundary", location));
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} else {
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uintptr_t diff = (char *) location - (char *) FLASH_START_ADDR;
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uint32_t sector = diff / FLASH_BLOCK_SIZE;
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flash_unlock();
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flash_clear_err();
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MG_REG(FLASH_NSCR) = 0;
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if ((sector < 128 && flash_bank_is_swapped()) ||
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(sector > 127 && !flash_bank_is_swapped())) {
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MG_REG(FLASH_NSCR) |= MG_BIT(31); // Set FLASH_CR_BKSEL
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}
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if (sector > 127) sector -= 128;
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MG_REG(FLASH_NSCR) |= MG_BIT(2) | (sector << 6); // Erase | sector_num
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MG_REG(FLASH_NSCR) |= MG_BIT(5); // Start erasing
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flash_wait();
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ok = !flash_is_err();
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MG_DEBUG(("Erase sector %lu @ %p: %s. CR %#lx SR %#lx", sector, location,
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ok ? "ok" : "fail", MG_REG(FLASH_NSCR), MG_REG(FLASH_NSSR)));
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// mg_hexdump(location, 32);
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MG_REG(FLASH_NSCR) = 0; // Restore saved CR
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}
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return ok;
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}
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static inline bool flash_swap_bank(void) {
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uint32_t desired = flash_bank_is_swapped() ? 0 : MG_BIT(31);
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flash_unlock();
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flash_clear_err();
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// printf("OPTSR_PRG 1 %#lx\n", FLASH->OPTSR_PRG);
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MG_SET_BITS(MG_REG(FLASH_OPTSR_PRG), MG_BIT(31), desired);
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// printf("OPTSR_PRG 2 %#lx\n", FLASH->OPTSR_PRG);
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MG_REG(FLASH_OPTCR) |= MG_BIT(1); // OPTSTART
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while ((MG_REG(FLASH_OPTSR_CUR) & MG_BIT(31)) != desired) (void) 0;
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return true;
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}
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static inline size_t flash_write_buf(void *addr, const void *buf, size_t len) {
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if ((len % FLASH_ALIGN_SIZE) != 0) {
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MG_ERROR(("%u is not aligned to %u", len, FLASH_ALIGN_SIZE));
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return 0;
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}
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uint32_t *dst = (uint32_t *) addr;
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uint32_t *src = (uint32_t *) buf;
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uint32_t *end = (uint32_t *) ((char *) buf + len);
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bool ok = true;
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MG_ARM_DISABLE_IRQ();
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flash_unlock();
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flash_clear_err();
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MG_REG(FLASH_NSCR) = MG_BIT(1); // Set programming flag
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while (ok && src < end) {
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#if 0
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if (flash_page_start(dst) && flash_erase_block(dst) == false) {
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ok = false;
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break;
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}
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#endif
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*(volatile uint32_t *) dst++ = *src++;
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flash_wait();
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if (flash_is_err()) {
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ok = false;
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break;
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}
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}
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MG_ARM_ENABLE_IRQ();
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MG_DEBUG(("Flash write %zu bytes @ %p: %s. CR %#lx SR %#lx", len, dst,
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flash_is_err() ? "fail" : "ok", MG_REG(FLASH_NSCR),
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MG_REG(FLASH_NSSR)));
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MG_REG(FLASH_NSCR) = 0; // Restore CR
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return (size_t) ((char *) src - (char *) buf);
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}

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