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debug
Signed-off-by: Kareem Farid <[email protected]>
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.github/workflows/test.yaml

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -23,9 +23,9 @@ jobs:
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make cocotb-verify-all-rtl
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- name: Check RTL Verification Results
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run: |
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ls ./verilog/dv/cocotb/sim/*/*/*.log
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ls ./verilog/dv/cocotb/sim/*/*/simv
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echo 1
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ls ./verilog/dv/cocotb/sim/*/*/*
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echo 2
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ls ./verilog/dv/cocotb/sim/*/*-compilation/*
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simv="$GITHUB_WORKSPACE/verilog/dv/cocotb/sim/CI/*-compilation/simv"
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if [ -f $simv ]; then

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