Skip to content

Commit 34434ea

Browse files
nerwaltnerwalt
committed
Enable ppi and gpiote suport
Updated buffered_uarte for new ppi support Adding gpiote examples Signed-off-by: Dmitry Tarnyagin <[email protected]> Signed-off-by: Vegard Eriksen <[email protected]> Signed-off-by: Tyson Lawrence <[email protected]>
1 parent 63ade38 commit 34434ea

File tree

11 files changed

+734
-103
lines changed

11 files changed

+734
-103
lines changed

‎embassy-nrf/src/buffered_uarte.rs‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -121,7 +121,7 @@ impl<U: UarteInstance> interrupt::typelevel::Handler<U::Interrupt> for Interrupt
121121

122122
// Enable endrx -> startrx PPI channel.
123123
// From this point on, if endrx happens, startrx is automatically fired.
124-
ppi::regs().chenset().write(|w| w.0 = 1 << chn);
124+
ppi::regs(()).chenset().write(|w| w.0 = 1 << chn);
125125

126126
// It is possible that endrx happened BEFORE enabling the PPI. In this case
127127
// the PPI channel doesn't trigger, and we'd hang. We have to detect this
@@ -145,15 +145,15 @@ impl<U: UarteInstance> interrupt::typelevel::Handler<U::Interrupt> for Interrupt
145145

146146
// Check if the PPI channel is still enabled. The PPI channel disables itself
147147
// when it fires, so if it's still enabled it hasn't fired.
148-
let ppi_ch_enabled = ppi::regs().chen().read().ch(chn as _);
148+
let ppi_ch_enabled = ppi::regs(()).chen().read().ch(chn as _);
149149

150150
// if rxend happened, and the ppi channel hasn't fired yet, the rxend got missed.
151151
// this condition also naturally matches if `!started`, needed to kickstart the DMA.
152152
if rxend_happened && ppi_ch_enabled {
153153
//trace!("manually starting.");
154154

155155
// disable the ppi ch, it's of no use anymore.
156-
ppi::regs().chenclr().write(|w| w.set_ch(chn as _, true));
156+
ppi::regs(()).chenclr().write(|w| w.set_ch(chn as _, true));
157157

158158
// manually start
159159
r.tasks_startrx().write_value(1);

‎embassy-nrf/src/chips/nrf54l15_app.rs‎

Lines changed: 122 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -206,7 +206,22 @@ pub const EASY_DMA_SIZE: usize = (1 << 16) - 1;
206206
pub const FLASH_SIZE: usize = 1536 * 1024;
207207

208208
embassy_hal_internal::peripherals! {
209-
// GPIO port 0
209+
// GPIOTE
210+
GPIOTE20_CH0,
211+
GPIOTE20_CH1,
212+
GPIOTE20_CH2,
213+
GPIOTE20_CH3,
214+
GPIOTE20_CH4,
215+
GPIOTE20_CH5,
216+
GPIOTE20_CH6,
217+
GPIOTE20_CH7,
218+
219+
GPIOTE30_CH0,
220+
GPIOTE30_CH1,
221+
GPIOTE30_CH2,
222+
GPIOTE30_CH3,
223+
224+
// GPIO port P0
210225
P0_00,
211226
P0_01,
212227
P0_02,
@@ -215,7 +230,7 @@ embassy_hal_internal::peripherals! {
215230
P0_05,
216231
P0_06,
217232

218-
// GPIO port 1
233+
// GPIO port P1
219234
P1_00,
220235
P1_01,
221236
P1_02,
@@ -234,8 +249,7 @@ embassy_hal_internal::peripherals! {
234249
P1_15,
235250
P1_16,
236251

237-
238-
// GPIO port 2
252+
// GPIO port P2
239253
P2_00,
240254
P2_01,
241255
P2_02,
@@ -248,6 +262,56 @@ embassy_hal_internal::peripherals! {
248262
P2_09,
249263
P2_10,
250264

265+
// PPI CHs
266+
PPI00_CH0,
267+
PPI00_CH1,
268+
PPI00_CH2,
269+
PPI00_CH3,
270+
PPI00_CH4,
271+
PPI00_CH5,
272+
PPI00_CH6,
273+
PPI00_CH7,
274+
275+
// DPPI10 channels are dedicated to the radio. Do not implement.
276+
277+
PPI20_CH0,
278+
PPI20_CH1,
279+
PPI20_CH2,
280+
PPI20_CH3,
281+
PPI20_CH4,
282+
PPI20_CH5,
283+
PPI20_CH6,
284+
PPI20_CH7,
285+
PPI20_CH8,
286+
PPI20_CH9,
287+
PPI20_CH10,
288+
PPI20_CH11,
289+
PPI20_CH12,
290+
PPI20_CH13,
291+
PPI20_CH14,
292+
PPI20_CH15,
293+
294+
PPI30_CH0,
295+
PPI30_CH1,
296+
PPI30_CH2,
297+
PPI30_CH3,
298+
299+
// PPI GROUPs
300+
PPI00_GROUP0,
301+
PPI00_GROUP1,
302+
303+
// DPPI10 groups are dedicated to the radio. Do not implement.
304+
305+
PPI20_GROUP0,
306+
PPI20_GROUP1,
307+
PPI20_GROUP2,
308+
PPI20_GROUP3,
309+
PPI20_GROUP4,
310+
PPI20_GROUP5,
311+
312+
PPI30_GROUP0,
313+
PPI30_GROUP1,
314+
251315
#[cfg(feature = "_s")]
252316
// RRAMC
253317
RRAMC,
@@ -269,8 +333,6 @@ impl_pin!(P0_01, 0, 1);
269333
impl_pin!(P0_02, 0, 2);
270334
impl_pin!(P0_03, 0, 3);
271335
impl_pin!(P0_04, 0, 4);
272-
impl_pin!(P0_05, 0, 5);
273-
impl_pin!(P0_06, 0, 6);
274336

275337
impl_pin!(P1_00, 1, 0);
276338
impl_pin!(P1_01, 1, 1);
@@ -288,7 +350,6 @@ impl_pin!(P1_12, 1, 12);
288350
impl_pin!(P1_13, 1, 13);
289351
impl_pin!(P1_14, 1, 14);
290352
impl_pin!(P1_15, 1, 15);
291-
impl_pin!(P1_16, 1, 16);
292353

293354
impl_pin!(P2_00, 2, 0);
294355
impl_pin!(P2_01, 2, 1);
@@ -302,6 +363,60 @@ impl_pin!(P2_08, 2, 8);
302363
impl_pin!(P2_09, 2, 9);
303364
impl_pin!(P2_10, 2, 10);
304365

366+
// DPPI00 channels
367+
impl_ppi_channel!(PPI00_CH0, pac::DPPIC00, 0 => configurable);
368+
impl_ppi_channel!(PPI00_CH1, pac::DPPIC00, 1 => configurable);
369+
impl_ppi_channel!(PPI00_CH2, pac::DPPIC00, 2 => configurable);
370+
impl_ppi_channel!(PPI00_CH3, pac::DPPIC00, 3 => configurable);
371+
impl_ppi_channel!(PPI00_CH4, pac::DPPIC00, 4 => configurable);
372+
impl_ppi_channel!(PPI00_CH5, pac::DPPIC00, 5 => configurable);
373+
impl_ppi_channel!(PPI00_CH6, pac::DPPIC00, 6 => configurable);
374+
impl_ppi_channel!(PPI00_CH7, pac::DPPIC00, 7 => configurable);
375+
376+
// DPPI10 channels are dedicated to the radio. Do not implement.
377+
378+
// DPPI20 channels
379+
impl_ppi_channel!(PPI20_CH0, pac::DPPIC20, 0 => configurable);
380+
impl_ppi_channel!(PPI20_CH1, pac::DPPIC20, 1 => configurable);
381+
impl_ppi_channel!(PPI20_CH2, pac::DPPIC20, 2 => configurable);
382+
impl_ppi_channel!(PPI20_CH3, pac::DPPIC20, 3 => configurable);
383+
impl_ppi_channel!(PPI20_CH4, pac::DPPIC20, 4 => configurable);
384+
impl_ppi_channel!(PPI20_CH5, pac::DPPIC20, 5 => configurable);
385+
impl_ppi_channel!(PPI20_CH6, pac::DPPIC20, 6 => configurable);
386+
impl_ppi_channel!(PPI20_CH7, pac::DPPIC20, 7 => configurable);
387+
impl_ppi_channel!(PPI20_CH8, pac::DPPIC20, 8 => configurable);
388+
impl_ppi_channel!(PPI20_CH9, pac::DPPIC20, 9 => configurable);
389+
impl_ppi_channel!(PPI20_CH10, pac::DPPIC20, 10 => configurable);
390+
impl_ppi_channel!(PPI20_CH11, pac::DPPIC20, 11 => configurable);
391+
impl_ppi_channel!(PPI20_CH12, pac::DPPIC20, 12 => configurable);
392+
impl_ppi_channel!(PPI20_CH13, pac::DPPIC20, 13 => configurable);
393+
impl_ppi_channel!(PPI20_CH14, pac::DPPIC20, 14 => configurable);
394+
impl_ppi_channel!(PPI20_CH15, pac::DPPIC20, 15 => configurable);
395+
396+
// DPPI30 channels
397+
impl_ppi_channel!(PPI30_CH0, pac::DPPIC30, 0 => configurable);
398+
impl_ppi_channel!(PPI30_CH1, pac::DPPIC30, 1 => configurable);
399+
impl_ppi_channel!(PPI30_CH2, pac::DPPIC30, 2 => configurable);
400+
impl_ppi_channel!(PPI30_CH3, pac::DPPIC30, 3 => configurable);
401+
402+
// DPPI00 groups
403+
impl_ppi_group!(PPI00_GROUP0, pac::DPPIC00, 0);
404+
impl_ppi_group!(PPI00_GROUP1, pac::DPPIC00, 1);
405+
406+
// DPPI10 groups are dedicated to the radio. Do not implement.
407+
408+
// DPPI20 groups
409+
impl_ppi_group!(PPI20_GROUP0, pac::DPPIC20, 0);
410+
impl_ppi_group!(PPI20_GROUP1, pac::DPPIC20, 1);
411+
impl_ppi_group!(PPI20_GROUP2, pac::DPPIC20, 2);
412+
impl_ppi_group!(PPI20_GROUP3, pac::DPPIC20, 3);
413+
impl_ppi_group!(PPI20_GROUP4, pac::DPPIC20, 4);
414+
impl_ppi_group!(PPI20_GROUP5, pac::DPPIC20, 5);
415+
416+
// DPPI30 groups
417+
impl_ppi_group!(PPI30_GROUP0, pac::DPPIC30, 0);
418+
impl_ppi_group!(PPI30_GROUP1, pac::DPPIC30, 1);
419+
305420
#[cfg(feature = "_ns")]
306421
impl_wdt!(WDT, WDT31, WDT31, 0);
307422
#[cfg(feature = "_s")]

0 commit comments

Comments
 (0)