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Merge branch 'feature/uart_transport' into 'feature/esp_as_mcu_host'
feature/uart_transport Added UART as a Hosted Transport See merge request app-frameworks/esp_hosted!513
2 parents 19d4cde + 8455066 commit bcfd914

22 files changed

+2404
-26
lines changed

CMakeLists.txt

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -48,8 +48,10 @@ else()
4848
list(APPEND COMPONENT_SRCS "${host_dir}/drivers/transport/sdio/sdio_drv.c" "${host_dir}/port/sdio_wrapper.c")
4949
elseif(CONFIG_ESP_SPI_HD_HOST_INTERFACE)
5050
list(APPEND COMPONENT_SRCS "${host_dir}/drivers/transport/spi_hd/spi_hd_drv.c" "${host_dir}/port/spi_hd_wrapper.c")
51-
else(CONFIG_ESP_SPI_HOST_INTERFACE)
51+
elseif(CONFIG_ESP_SPI_HOST_INTERFACE)
5252
list(APPEND COMPONENT_SRCS "${host_dir}/drivers/transport/spi/spi_drv.c" "${host_dir}/port/spi_wrapper.c")
53+
elseif(CONFIG_ESP_UART_HOST_INTERFACE)
54+
list(APPEND COMPONENT_SRCS "${host_dir}/drivers/transport/uart/uart_drv.c" "${host_dir}/port/uart_wrapper.c")
5355
endif()
5456
endif()
5557

Kconfig

Lines changed: 154 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -32,38 +32,43 @@ menu "ESP-Hosted config"
3232
bool "SPI Half-duplex"
3333
help
3434
Enable/Disable SPI Half-duplex host interface
35+
36+
config ESP_UART_HOST_INTERFACE
37+
bool "UART"
38+
help
39+
Enable/Disable UART host interface
3540
endchoice
3641

3742
choice ESP_HOSTED_SLAVE_CHIPSET_USED
3843
bool "Slave chipset to be used"
3944
default SLAVE_CHIPSET_ESP32C6
4045

4146
config SLAVE_CHIPSET_ESP32
42-
depends on ESP_SPI_HOST_INTERFACE || ESP_SDIO_HOST_INTERFACE
47+
depends on ESP_SPI_HOST_INTERFACE || ESP_SDIO_HOST_INTERFACE || ESP_UART_HOST_INTERFACE
4348
bool "Slave as ESP32"
4449

4550
config SLAVE_CHIPSET_ESP32S2
46-
depends on ESP_SPI_HOST_INTERFACE || ESP_SPI_HD_HOST_INTERFACE
51+
depends on ESP_SPI_HOST_INTERFACE || ESP_SPI_HD_HOST_INTERFACE || ESP_UART_HOST_INTERFACE
4752
bool "Slave as ESP32S2"
4853

4954
config SLAVE_CHIPSET_ESP32S3
50-
depends on ESP_SPI_HOST_INTERFACE || ESP_SPI_HD_HOST_INTERFACE
55+
depends on ESP_SPI_HOST_INTERFACE || ESP_SPI_HD_HOST_INTERFACE || ESP_UART_HOST_INTERFACE
5156
bool "Slave as ESP32S3"
5257

5358
config SLAVE_CHIPSET_ESP32C2
54-
depends on ESP_SPI_HOST_INTERFACE || ESP_SPI_HD_HOST_INTERFACE
59+
depends on ESP_SPI_HOST_INTERFACE || ESP_SPI_HD_HOST_INTERFACE || ESP_UART_HOST_INTERFACE
5560
bool "Slave as ESP32C2"
5661

5762
config SLAVE_CHIPSET_ESP32C3
58-
depends on ESP_SPI_HOST_INTERFACE || ESP_SPI_HD_HOST_INTERFACE
63+
depends on ESP_SPI_HOST_INTERFACE || ESP_SPI_HD_HOST_INTERFACE || ESP_UART_HOST_INTERFACE
5964
bool "Slave as ESP32C3"
6065

6166
config SLAVE_CHIPSET_ESP32C6
62-
depends on ESP_SPI_HOST_INTERFACE || ESP_SDIO_HOST_INTERFACE || ESP_SPI_HD_HOST_INTERFACE
67+
depends on ESP_SPI_HOST_INTERFACE || ESP_SDIO_HOST_INTERFACE || ESP_SPI_HD_HOST_INTERFACE || ESP_UART_HOST_INTERFACE
6368
bool "Slave as ESP32C6"
6469

6570
config SLAVE_CHIPSET_ESP32C5
66-
depends on ESP_SPI_HOST_INTERFACE || ESP_SPI_HD_HOST_INTERFACE
71+
depends on ESP_SPI_HOST_INTERFACE || ESP_SPI_HD_HOST_INTERFACE || ESP_UART_HOST_INTERFACE
6772
bool "Slave as ESP32C5"
6873
endchoice
6974

@@ -664,16 +669,146 @@ ESP32XX_SPI_HD_CLK_FREQ_RANGE_MAX := 40
664669
ENABLE/DISABLE software checksum
665670
endmenu
666671

672+
menu "UART Configuration"
673+
depends on ESP_UART_HOST_INTERFACE
674+
675+
choice ESP_UART_RESET_GPIO_CONFIG
676+
bool "RESET GPIO Config"
677+
default ESP_UART_RESET_ACTIVE_HIGH
678+
help
679+
"If Active High, High->Low->High will trigger reset (Low will trigger reset)
680+
If Active Low, Low->High->Low will trigger reset (High will trigger reset)"
681+
682+
config ESP_UART_RESET_ACTIVE_HIGH
683+
bool "RESET: Active High"
684+
config ESP_UART_RESET_ACTIVE_LOW
685+
bool "RESET: Active Low"
686+
endchoice
687+
688+
config ESP_UART_PORT
689+
int "UART Port to Use"
690+
default 1
691+
range 0 2 if IDF_TARGET_ESP32
692+
range 0 1 if IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C5 || IDF_TARGET_ESP32C6
693+
range 0 2 if IDF_TARGET_ESP32C61
694+
range 0 1 if IDF_TARGET_ESP32S2
695+
range 0 2 if IDF_TARGET_ESP32S3
696+
range 0 4 if IDF_TARGET_ESP32P4
697+
help
698+
Select UART Port to Use. Do not select the UART Port used for console output (if enabled)
699+
700+
config ESP_UART_PIN_TX
701+
int "TX GPIO number"
702+
default 13 if IDF_TARGET_ESP32
703+
default 5 if IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32C3
704+
default 14 if IDF_TARGET_ESP32C5
705+
default 21 if IDF_TARGET_ESP32C6
706+
default 5 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3
707+
default 14 if IDF_TARGET_ESP32P4
708+
help
709+
GPIO used for UART TX
710+
711+
config ESP_UART_PIN_RX
712+
int "RX GPIO number"
713+
default 12 if IDF_TARGET_ESP32
714+
default 4 if IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32C3
715+
default 13 if IDF_TARGET_ESP32C5
716+
default 20 if IDF_TARGET_ESP32C6
717+
default 4 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3
718+
default 15 if IDF_TARGET_ESP32P4
719+
help
720+
GPIO used for UART RX
721+
722+
config ESP_UART_BAUDRATE
723+
int "Baud Rate"
724+
default 921600
725+
range 9600 3500000
726+
help
727+
Baud Rate to Use. Make sure Hardware supports the rate. Standard rates are 9600, 19200, 38400, 57600, 115200, 460800, 921600
728+
729+
config ESP_UART_NUM_DATA_BITS
730+
int "Number of Data Bits"
731+
default 8
732+
range 5 8
733+
help
734+
Number of Data Bits to use
735+
736+
choice ESP_UART_PRIV_PARITY
737+
bool "Parity"
738+
739+
config ESP_UART_PRIV_PARITY_NONE
740+
bool "None"
741+
742+
config ESP_UART_PRIV_PARITY_EVEN
743+
bool "Even"
744+
745+
config ESP_UART_PRIV_PARITY_ODD
746+
bool "Odd"
747+
endchoice
748+
749+
config ESP_UART_PARITY
750+
int
751+
default 0 if ESP_UART_PRIV_PARITY_NONE
752+
default 1 if ESP_UART_PRIV_PARITY_EVEN
753+
default 2 if ESP_UART_PRIV_PARITY_ODD
754+
755+
choice ESP_UART_PRIV_STOP_BITS
756+
bool "Number of Stop Bits"
757+
758+
config ESP_UART_PRIV_STOP_BITS_1
759+
bool "1"
760+
761+
config ESP_UART_PRIV_STOP_BITS_1_5
762+
bool "1.5"
763+
764+
config ESP_UART_PRIV_STOP_BITS_2
765+
bool "2"
766+
endchoice
767+
768+
config ESP_UART_STOP_BITS
769+
int
770+
default 0 if ESP_UART_PRIV_STOP_BITS_1
771+
default 1 if ESP_UART_PRIV_STOP_BITS_1_5
772+
default 2 if ESP_UART_PRIV_STOP_BITS_2
773+
774+
config ESP_UART_GPIO_RESET_SLAVE
775+
int "GPIO pin for Reseting slave ESP"
776+
default 54 if IDF_TARGET_ESP32P4
777+
default 42 if IDF_TARGET_ESP32S3
778+
default 5
779+
help
780+
GPIO pin for Resetting ESP SDIO slave device. Should be connected to RST/EN of ESP SDIO slave device.
781+
782+
config ESP_UART_TX_Q_SIZE
783+
int "Tx Queue Size"
784+
default 5
785+
help
786+
Very small RX queue will lower ESP -- UART --> Host data rate
787+
788+
config ESP_UART_RX_Q_SIZE
789+
int "Rx Queue Size"
790+
default 5
791+
help
792+
Very small RX queue will lower ESP <-- UART -- Host data rate
793+
794+
config ESP_UART_CHECKSUM
795+
bool "UART checksum ENABLE/DISABLE"
796+
default y
797+
help
798+
ENABLE/DISABLE software UART checksum
799+
endmenu
800+
667801
config ESP_GPIO_SLAVE_RESET_SLAVE
668802
int
669803
default ESP_SPI_GPIO_RESET_SLAVE if ESP_SPI_HOST_INTERFACE
670804
default ESP_SDIO_GPIO_RESET_SLAVE if ESP_SDIO_HOST_INTERFACE
671805
default ESP_SPI_HD_GPIO_RESET_SLAVE if ESP_SPI_HD_HOST_INTERFACE
806+
default ESP_UART_GPIO_RESET_SLAVE if ESP_UART_HOST_INTERFACE
672807

673808
config RESET_GPIO_ACTIVE_LOW
674809
bool
675-
default n if SDIO_RESET_ACTIVE_HIGH || SPI_RESET_ACTIVE_HIGH || SPI_HD_RESET_ACTIVE_HIGH
676-
default y if SDIO_RESET_ACTIVE_LOW || SPI_RESET_ACTIVE_LOW || SPI_HD_RESET_ACTIVE_LOW
810+
default n if SDIO_RESET_ACTIVE_HIGH || SPI_RESET_ACTIVE_HIGH || SPI_HD_RESET_ACTIVE_HIGH || ESP_UART_RESET_ACTIVE_HIGH
811+
default y if SDIO_RESET_ACTIVE_LOW || SPI_RESET_ACTIVE_LOW || SPI_HD_RESET_ACTIVE_LOW || ESP_UART_RESET_ACTIVE_LOW
677812

678813
menu "Bluetooth Support"
679814

@@ -824,12 +959,22 @@ ESP32XX_SPI_HD_CLK_FREQ_RANGE_MAX := 40
824959
Host will throttle incoming data if the slave datapath Rx load goes beyond this threshold
825960
0 value will disable this function
826961

962+
config PRIV_WIFI_TX_UART_HIGH_THRESHOLD
963+
depends on HOST_TO_ESP_WIFI_DATA_THROTTLE && ESP_UART_HOST_INTERFACE
964+
int "High threshold to report host to drop data when wifi highly loaded"
965+
range 0 100
966+
default 80
967+
help
968+
Host will throttle incoming data if the slave datapath Rx load goes beyond this threshold
969+
0 value will disable this function
970+
827971
config TO_WIFI_DATA_THROTTLE_HIGH_THRESHOLD
828972
depends on HOST_TO_ESP_WIFI_DATA_THROTTLE
829973
int
830974
default PRIV_WIFI_TX_SPI_HIGH_THRESHOLD if ESP_SPI_HOST_INTERFACE
831975
default PRIV_WIFI_TX_SDIO_HIGH_THRESHOLD if ESP_SDIO_HOST_INTERFACE
832976
default PRIV_WIFI_TX_SPI_HD_HIGH_THRESHOLD if ESP_SPI_HD_HOST_INTERFACE
977+
default PRIV_WIFI_TX_UART_HIGH_THRESHOLD if ESP_UART_HOST_INTERFACE
833978

834979
config TO_WIFI_DATA_THROTTLE_LOW_THRESHOLD
835980
depends on HOST_TO_ESP_WIFI_DATA_THROTTLE

README.md

Lines changed: 9 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -159,13 +159,19 @@ Legends:
159159
| Transport | Type | Num of GPIOs | Setup with | Co-processor supported | Host Tx iperf | Host Rx iperf | Remarks |
160160
|:---------------:|:-----:|:------------:|:----------------:|:--------------:|:------------:|:-----------:|:--------------------------:|
161161
| Standard SPI | FD | 6 | jumper or PCB | Any_Slave | udp: 24 tcp: 22 | udp: 25 tcp: 22| Simplest solution for quick test |
162-
| Dual SPI | HD | 5 | jumper or PCB | Any_Slave | udp: 32 tcp: 26 (O) | udp: 33 tcp: 25 (O) | Better throughput, but half duplex |
163-
| Quad SPI | HD | 7 | PCB only | Any_Slave | udp: 41 tcp: 29 (O) | udp: 42 tcp: 28 (O) | Due to signal integrity, PCB is mandatory |
162+
| Dual SPI | HD | 5 | jumper or PCB | Any_Slave [1] | udp: 32 tcp: 26 (O) | udp: 33 tcp: 25 (O) | Better throughput, but half duplex |
163+
| Quad SPI | HD | 7 | PCB only | Any_Slave [1] | udp: 41 tcp: 29 (O) | udp: 42 tcp: 28 (O) | Due to signal integrity, PCB is mandatory |
164164
| SDIO 1-Bit | HD | 4 | jumper or PCB | ESP32, ESP32-C6 | TBD | TBD | Stepping stone for PCB based SDIO 4-bit |
165165
| SDIO 4-Bit | HD | 6 | PCB only | ESP32, ESP32-C6 | udp: 79.5 tcp: 53.4 (S) | udp: 68.1 tcp: 44 (S) | Highest performance |
166166
| Only BT over UART | FD | 2 or 4 | jumper or PCB | Any_Slave | NA | NA | Dedicated Bluetooth over UART pins |
167+
| UART | FD | 2 | jumper or PCB | Any_Slave | udp: 0.68 tcp: 0.67 (O) | udp: 0.68 tcp: 0.60 (O) | UART dedicated for BT & Wi-Fi [2] |
167168
| Dedicated platforms | FD | Extra 2 or 4 | jumper or PCB | Any_Slave | NA | NA | UART dedicated for BT & Wi-Fi on any other transport |
168169

170+
> [!NOTE]
171+
> - [1] Dual/Quad SPI is not supported on ESP32
172+
>
173+
> - [2] UART is only suitable for low throughput environments
174+
169175
With jumper cables, 'Standard SPI' and 'Dual SPI' solutions are easiest to evaluate, without much of hardware dependencies. SDIO 1-Bit can be tested with jumper cables, but it needs some additional hardware config, such as installation of external pull-up registers.
170176

171177
In case case of dedicated platforms, Blutooth uses standard HCI over UART. In rest of cases, Bluetooth and Wi-Fi uses same transport and hence less GPIOs and less complicated. In shared mode, bluetooth runs as vHCI (multiplexed mode)
@@ -235,7 +241,7 @@ Irrespective of transport chosen, following steps are needed, which are step-wis
235241

236242
- [**SDIO (1-Bit / 4-Bit)**](docs/sdio.md)
237243

238-
- [**UART**](docs/uart.md)
244+
- [**UART for Wi-Fi and Bluetooth**](docs/uart.md)
239245

240246
## 9 Examples
241247
Check [examples](./examples) directory for sample applications using ESP-Hosted.

common/include/adapter.h

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -164,7 +164,7 @@ typedef enum {
164164

165165
typedef enum {
166166
ESP_WLAN_SDIO_SUPPORT = (1 << 0),
167-
ESP_BT_UART_SUPPORT = (1 << 1),
167+
ESP_BT_UART_SUPPORT = (1 << 1), // HCI over UART
168168
ESP_BT_SDIO_SUPPORT = (1 << 2),
169169
ESP_BLE_ONLY_SUPPORT = (1 << 3),
170170
ESP_BR_EDR_ONLY_SUPPORT = (1 << 4),
@@ -182,6 +182,11 @@ typedef enum {
182182
// features supported
183183
ESP_WLAN_SUPPORT = (1 << 4),
184184
ESP_BT_INTERFACE_SUPPORT = (1 << 5), // bt supported over current interface
185+
// leave a gap for future expansion
186+
187+
// Hosted UART interface
188+
ESP_WLAN_UART_SUPPORT = (1 << 8),
189+
ESP_BT_VHCI_UART_SUPPORT = (1 << 9), // VHCI over UART
185190
} ESP_EXTENDED_CAPABILITIES;
186191

187192
typedef enum {

docs/design_consideration.md

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -191,4 +191,5 @@ solution to your problem may have already been provided.
191191
- SPI Full Duplex interface documentation: [spi_full_duplex.md](spi_full_duplex.md)
192192
- SDIO interface documentation: [sdio.md](sdio.md)
193193
- SPI Half Duplex interface documentation: [spi_half_duplex.md](spi_half_duplex.md)
194+
- UART documentation: [uart.md](uart.md)
194195
- Troubleshooting Guide: [troubleshooting.md](troubleshooting.md)

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