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[SYCL] Remove SYCL_USE_NATIVE_FP_ATOMICS macro (#19962)
This PR removes `SYCL_USE_NATIVE_FP_ATOMICS` macro. It's removed because we don't support FPGA anymore and macro was defined for all target except FPGA. https://github.com/intel/llvm/blob/45cf4436aac62b68c55c7ba8ba994004b88220f7/clang/lib/Frontend/InitPreprocessor.cpp#L1548-L1551
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3 files changed

+5
-33
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clang/lib/Frontend/InitPreprocessor.cpp

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1545,10 +1545,7 @@ static void InitializePredefinedMacros(const TargetInfo &TI,
15451545
// with TI set to the device TargetInfo.
15461546
const llvm::Triple &Triple = TI.getTriple();
15471547
const llvm::Triple::SubArchType SubArch = Triple.getSubArch();
1548-
if (Triple.isNVPTX() || Triple.isAMDGPU() ||
1549-
(Triple.isSPIR() && SubArch != llvm::Triple::SPIRSubArch_fpga) ||
1550-
Triple.isNativeCPU())
1551-
Builder.defineMacro("SYCL_USE_NATIVE_FP_ATOMICS");
1548+
15521549
// Enable generation of USM address spaces for FPGA.
15531550
if (SubArch == llvm::Triple::SPIRSubArch_fpga) {
15541551
Builder.defineMacro("__ENABLE_USM_ADDR_SPACE__");

clang/test/Preprocessor/sycl-macro-target-specific.cpp

Lines changed: 0 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -34,23 +34,6 @@
3434
// CHECK-AMDGPU: #define __AMDGPU__
3535
// CHECK-AMDGPU-NEG-NOT: #define __AMDGPU__
3636

37-
// RUN: %clang_cc1 %s -fsycl-is-device -triple spir64-unknown-unknown -E -dM \
38-
// RUN: | FileCheck --check-prefix=CHECK-SYCL-FP-ATOMICS %s
39-
// RUN: %clang_cc1 %s -fsycl-is-device -triple spir64_gen-unknown-unknown -E -dM \
40-
// RUN: | FileCheck --check-prefix=CHECK-SYCL-FP-ATOMICS %s
41-
// RUN: %clang_cc1 %s -fsycl-is-device -triple spir64_x86_64-unknown-unknown -E -dM \
42-
// RUN: | FileCheck --check-prefix=CHECK-SYCL-FP-ATOMICS %s
43-
// RUN: %clang_cc1 %s -fsycl-is-device -triple spir64_fpga-unknown-unknown -E -dM \
44-
// RUN: | FileCheck --check-prefix=CHECK-SYCL-FP-ATOMICS-NEG %s
45-
// RUN: %clang_cc1 %s -fsycl-is-device -triple nvptx64-nvidia-nvcl -E -dM \
46-
// RUN: | FileCheck --check-prefix=CHECK-SYCL-FP-ATOMICS %s
47-
// RUN: %clang_cc1 %s -fsycl-is-device -triple amdgcn-amdhsa-amdhsa -E -dM \
48-
// RUN: | FileCheck --check-prefix=CHECK-SYCL-FP-ATOMICS %s
49-
// RUN: %clang_cc1 %s -fsycl-is-device -triple native_cpu \
50-
// RUN: -E -dM | FileCheck --check-prefix=CHECK-SYCL-FP-ATOMICS %s
51-
// CHECK-SYCL-FP-ATOMICS: #define SYCL_USE_NATIVE_FP_ATOMICS
52-
// CHECK-SYCL-FP-ATOMICS-NEG-NOT: #define SYCL_USE_NATIVE_FP_ATOMICS
53-
5437
// RUN: %clang_cc1 %s -fsycl-is-device -triple spir64_fpga-unknown-unknown -E -dM \
5538
// RUN: | FileCheck --check-prefix=CHECK-USM-ADDR-SPACE %s
5639
// RUN: %clang_cc1 %s -fsycl-is-device -triple spir64-unknown-unknown -E -dM \

sycl/include/sycl/atomic_ref.hpp

Lines changed: 4 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -469,9 +469,7 @@ class atomic_ref_impl<T, SizeOfT, DefaultOrder, DefaultScope, AddressSpace,
469469

470470
T fetch_add(T operand, memory_order order = default_read_modify_write_order,
471471
memory_scope scope = default_scope) const noexcept {
472-
// TODO: Remove the "native atomics" macro check once implemented for all
473-
// backends
474-
#if defined(__SYCL_DEVICE_ONLY__) && defined(SYCL_USE_NATIVE_FP_ATOMICS)
472+
#if defined(__SYCL_DEVICE_ONLY__)
475473
return detail::spirv::AtomicFAdd(ptr, scope, order, operand);
476474
#else
477475
auto load_order = detail::getLoadOrder(order);
@@ -492,9 +490,7 @@ class atomic_ref_impl<T, SizeOfT, DefaultOrder, DefaultScope, AddressSpace,
492490

493491
T fetch_sub(T operand, memory_order order = default_read_modify_write_order,
494492
memory_scope scope = default_scope) const noexcept {
495-
// TODO: Remove the "native atomics" macro check once implemented for all
496-
// backends
497-
#if defined(__SYCL_DEVICE_ONLY__) && defined(SYCL_USE_NATIVE_FP_ATOMICS)
493+
#if defined(__SYCL_DEVICE_ONLY__)
498494
return detail::spirv::AtomicFAdd(ptr, scope, order, -operand);
499495
#else
500496
auto load_order = detail::getLoadOrder(order);
@@ -513,9 +509,7 @@ class atomic_ref_impl<T, SizeOfT, DefaultOrder, DefaultScope, AddressSpace,
513509

514510
T fetch_min(T operand, memory_order order = default_read_modify_write_order,
515511
memory_scope scope = default_scope) const noexcept {
516-
// TODO: Remove the "native atomics" macro check once implemented for all
517-
// backends
518-
#if defined(__SYCL_DEVICE_ONLY__) && defined(SYCL_USE_NATIVE_FP_ATOMICS)
512+
#if defined(__SYCL_DEVICE_ONLY__)
519513
return detail::spirv::AtomicMin(ptr, scope, order, operand);
520514
#else
521515
auto load_order = detail::getLoadOrder(order);
@@ -529,9 +523,7 @@ class atomic_ref_impl<T, SizeOfT, DefaultOrder, DefaultScope, AddressSpace,
529523

530524
T fetch_max(T operand, memory_order order = default_read_modify_write_order,
531525
memory_scope scope = default_scope) const noexcept {
532-
// TODO: Remove the "native atomics" macro check once implemented for all
533-
// backends
534-
#if defined(__SYCL_DEVICE_ONLY__) && defined(SYCL_USE_NATIVE_FP_ATOMICS)
526+
#if defined(__SYCL_DEVICE_ONLY__)
535527
return detail::spirv::AtomicMax(ptr, scope, order, operand);
536528
#else
537529
auto load_order = detail::getLoadOrder(order);

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