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## SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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##
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## SPDX-License-Identifier: Apache-2.0
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##
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import
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esp_err, driver/i2c_types, hal/gpio_types
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##
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## @brief I2C master bus specific configurations
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##
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type
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INNER_C_STRUCT_i2c_master_3* {.bycopy.} =object
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enable_internal_pullup* {.bitsize: 1.}: uint32_t
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## !< Enable internal pullups. Note: This is not strong enough to pullup buses under high-speed frequency. Recommend proper external pull-up if possible
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allow_pd* {.bitsize: 1.}: uint32_t
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## !< If set, the driver will backup/restore the I2C registers before/after entering/exist sleep mode.
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## By this approach, the system can power off I2C's power domain.
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## This can save power, but at the expense of more RAM being consumed
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i2c_master_bus_config_t* {.bycopy.} =object
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i2c_port*: i2c_port_num_t
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## !< I2C port number, `-1` for auto selecting, (not include LP I2C instance)
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sda_io_num*: gpio_num_t
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## !< GPIO number of I2C SDA signal, pulled-up internally
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scl_io_num*: gpio_num_t
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## !< GPIO number of I2C SCL signal, pulled-up internally
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anon2_clk_source*: i2c_clock_source_t
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## !< Clock source of I2C master bus
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whenSOC_LP_I2C_SUPPORTED:
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var lp_source_clk*: lp_i2c_clock_source_t
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## !< LP_UART source clock selection
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glitch_ignore_cnt*: uint8_t
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## !< If the glitch period on the line is less than this value, it can be filtered out, typically value is 7 (unit: I2C module clock cycle)
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intr_priority*: cint
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## !< I2C interrupt priority, if set to 0, driver will select the default priority (1,2,3).
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trans_queue_depth*: csize_t
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## !< Depth of internal transfer queue, increase this value can support more transfers pending in the background, only valid in asynchronous transaction. (Typically max_device_num * per_transaction)
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flags*: INNER_C_STRUCT_i2c_master_3
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## !< I2C master config flags
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const
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I2C_DEVICE_ADDRESS_NOT_USED*= (0xffff) ## !< Skip carry address bit in driver transmit and receive
uint8_tglitch_ignore_cnt; /*!< If the glitch period on the line is less than this value, it can be filtered out, typically value is 7 (unit: I2C module clock cycle)*/
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intintr_priority; /*!< I2C interrupt priority, if set to 0, driver will select the default priority (1,2,3). */
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size_ttrans_queue_depth; /*!< Depth of internal transfer queue, increase this value can support more transfers pending in the background, only valid in asynchronous transaction. (Typically max_device_num * per_transaction)*/
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struct {
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uint32_tenable_internal_pullup: 1; /*!< Enable internal pullups. Note: This is not strong enough to pullup buses under high-speed frequency. Recommend proper external pull-up if possible */
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uint32_tallow_pd: 1; /*!< If set, the driver will backup/restore the I2C registers before/after entering/exist sleep mode.
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By this approach, the system can power off I2C's power domain.
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This can save power, but at the expense of more RAM being consumed */
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} flags; /*!< I2C master config flags */
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} i2c_master_bus_config_t;
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#defineI2C_DEVICE_ADDRESS_NOT_USED (0xffff) /*!< Skip carry address bit in driver transmit and receive */
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