fix: vec_len -> simd_len (an error was present due to setting vec_len instead of simd_len for AVX register types)

Author: madhav-madhusoodanan

crates/intrinsic-test/src/x86/config.rs

@@ -15,6 +15,7 @@ typedef float float32_t;
 typedef double float64_t;
 
 #define __int64 long long
+#define __int32 int
 
 #define mm512_extract_intrinsic_test_epi8(m, lane) \
     _mm_extract_epi8(_mm512_extracti64x2_epi64((m), (lane) / 16), (lane) % 16)

crates/intrinsic-test/src/x86/types.rs

@@ -209,9 +209,9 @@ impl IntrinsicTypeDefinition for X86IntrinsicType {
     /// Determines the get lane function for this type.
     fn get_lane_function(&self) -> String {
         let total_vector_bits: Option<u32> = self
-            .vec_len
+            .simd_len
             .zip(self.bit_len)
-            .and_then(|(vec_len, bit_len)| Some(vec_len * bit_len));
+            .and_then(|(simd_len, bit_len)| Some(simd_len * bit_len));
 
         match (self.bit_len, total_vector_bits) {
             (Some(8), Some(128)) => String::from("_mm_extract_epi8"),
@@ -231,7 +231,7 @@ impl IntrinsicTypeDefinition for X86IntrinsicType {
             (Some(32), Some(64)) => String::from("mm64_extract_intrinsic_test_epi32"),
             _ => unreachable!(
                 "invalid length for vector argument: {:?}, {:?}",
-                self.bit_len, self.vec_len
+                self.bit_len, self.simd_len
             ),
         }
     }
@@ -345,9 +345,9 @@ impl X86IntrinsicType {
                 if param.type_data.matches("__m").next().is_some()
                     && param.type_data.matches("__mmask").next().is_none()
                 {
-                    data.vec_len = match str::parse::<u32>(type_processed.as_str()) {
-                        // If bit_len is None, vec_len will be None.
-                        // Else vec_len will be (num_bits / bit_len).
+                    data.simd_len = match str::parse::<u32>(type_processed.as_str()) {
+                        // If bit_len is None, simd_len will be None.
+                        // Else simd_len will be (num_bits / bit_len).
                         Ok(num_bits) => data.bit_len.and_then(|bit_len| Some(num_bits / bit_len)),
                         Err(_) => None,
                     };

crates/intrinsic-test/src/x86/xml_parser.rs

@@ -106,7 +106,7 @@ fn xml_to_intrinsic(
     let mut args_test = args.iter();
 
     // if one of the args has etype="MASK" and type="__m<int>d",
-    // then set the bit_len and vec_len accordingly
+    // then set the bit_len and simd_len accordingly
     let re = Regex::new(r"__m\d+").unwrap();
     let is_mask = |arg: &Argument<X86IntrinsicType>| arg.ty.param.etype.as_str() == "MASK";
     let is_vector = |arg: &Argument<X86IntrinsicType>| re.is_match(arg.ty.param.type_data.as_str());