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Add ArrowLake-S devicetree
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+208
-4
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3 files changed

+208
-4
lines changed

‎src/soc/intel/meteorlake/Kconfig‎

Lines changed: 11 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -70,7 +70,7 @@ config SOC_INTEL_METEORLAKE
7070
select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2
7171
select SOC_INTEL_COMMON_BLOCK_HDA
7272
select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC
73-
select SOC_INTEL_COMMON_BLOCK_IPU
73+
select SOC_INTEL_COMMON_BLOCK_IPU if !SOC_INTEL_ARROWLAKE_PCH_S
7474
select SOC_INTEL_COMMON_BLOCK_IOE_P2SB
7575
select SOC_INTEL_COMMON_BLOCK_IRQ
7676
select SOC_INTEL_COMMON_BLOCK_ME_SPEC_18
@@ -139,6 +139,11 @@ config SOC_INTEL_METEORLAKE_PRE_PRODUCTION_SILICON
139139
silicon. Typically known as engineering samples (like ES). This type
140140
of the silicon are very common for early platform development.
141141

142+
config SOC_INTEL_ARROWLAKE_PCH_S
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bool
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help
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Choose this option if your mainboard has an Arrow Lake PCH-S chipset.
146+
142147
if SOC_INTEL_METEORLAKE
143148

144149
config SOC_INTEL_METEORLAKE_TCSS_USB4_SUPPORT
@@ -159,7 +164,7 @@ config METEORLAKE_CAR_ENHANCED_NEM
159164

160165
config MAX_CPUS
161166
int
162-
default 22
167+
default 24
163168

164169
config DCACHE_RAM_BASE
165170
default 0xfef00000
@@ -189,6 +194,7 @@ config FSP_TEMP_RAM_SIZE
189194

190195
config CHIPSET_DEVICETREE
191196
string
197+
default "soc/intel/meteorlake/chipset_pch_s.cb" if SOC_INTEL_ARROWLAKE_PCH_S
192198
default "soc/intel/meteorlake/chipset.cb"
193199

194200
config EXT_BIOS_WIN_BASE
@@ -227,14 +233,17 @@ endif # SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
227233

228234
config MAX_TBT_ROOT_PORTS
229235
int
236+
default 2 if SOC_INTEL_ARROWLAKE_PCH_S
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default 4
231238

232239
config MAX_ROOT_PORTS
233240
int
241+
default 24 if SOC_INTEL_ARROWLAKE_PCH_S
234242
default 12
235243

236244
config MAX_PCIE_CLOCK_SRC
237245
int
246+
default 13 if SOC_INTEL_ARROWLAKE_PCH_S
238247
default 9
239248

240249
config SMM_TSEG_SIZE

‎src/soc/intel/meteorlake/chipset_pch_s.cb‎

Lines changed: 189 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,189 @@
1+
chip soc/intel/meteorlake
2+
3+
device cpu_cluster 0 on end
4+
5+
register "power_limits_config[MTL_P_282_242_CORE]" = "{
6+
.tdp_pl1_override = 15,
7+
.tdp_pl2_override = 57,
8+
.tdp_pl4 = 114,
9+
}"
10+
11+
register "power_limits_config[MTL_P_682_482_CORE]" = "{
12+
.tdp_pl1_override = 28,
13+
.tdp_pl2_override = 64,
14+
.tdp_pl4 = 120,
15+
}"
16+
17+
#TODO: ARL-HX limits
18+
19+
# Reduce the size of BasicMemoryTests to speed up the boot time.
20+
register "lower_basic_mem_test_size" = "true"
21+
22+
# The power state current threshold is defined in 1/4 A
23+
# increments. A value of 400 = 100A.
24+
register "ps_cur_2_threshold[VR_DOMAIN_SA]" = "40" # 10A
25+
26+
# NOTE: if any variant wants to override this value, use the same format
27+
# as register "common_soc_config.pch_thermal_trip" = "value", instead of
28+
# putting it under register "common_soc_config" in overridetree.cb file.
29+
register "common_soc_config.pch_thermal_trip" = "130"
30+
31+
# Temporary setting TCC of 90C = Tj max (110) - TCC_Offset (20)
32+
register "tcc_offset" = "20"
33+
34+
# Enable CNVi WiFi
35+
register "cnvi_wifi_core" = "true"
36+
37+
device domain 0 on
38+
device pci 00.0 alias system_agent on end
39+
device pci 01.0 alias pcie_rp12 off end
40+
device pci 02.0 alias igpu off end
41+
device pci 04.0 alias dtt off end
42+
device pci 05.0 alias ipu off end
43+
device pci 06.0 alias pcie_rp13 off end
44+
device pci 06.1 alias pcie_rp10 off end
45+
device pci 06.3 alias pcie_rp14 off end
46+
device pci 06.4 alias pcie_rp15 off end
47+
device pci 07.0 alias tbt_pcie_rp0 off
48+
chip soc/intel/common/block/usb4
49+
use tcss_dma0 as usb4_port
50+
device generic 0 on end
51+
end
52+
end
53+
device pci 07.1 alias tbt_pcie_rp1 off
54+
chip soc/intel/common/block/usb4
55+
use tcss_dma0 as usb4_port
56+
device generic 1 on end
57+
end
58+
end
59+
device pci 08.0 alias gna off end
60+
device pci 0a.0 alias crashlog on end
61+
device pci 0b.0 alias vpu off end
62+
device pci 0d.0 alias tcss_xhci off
63+
chip drivers/usb/acpi
64+
register "type" = "UPC_TYPE_HUB"
65+
device usb 0.0 alias tcss_root_hub off
66+
chip drivers/usb/acpi
67+
device usb 3.0 alias tcss_usb3_port0 off end
68+
end
69+
chip drivers/usb/acpi
70+
device usb 3.1 alias tcss_usb3_port1 off end
71+
end
72+
end
73+
end
74+
end
75+
device pci 0d.1 alias tcss_xdci off end
76+
device pci 0d.2 alias tcss_dma0 off end
77+
device pci 0e.0 alias vmd off end
78+
device pci 10.0 alias thc0 off end
79+
device pci 10.1 alias thc1 off end
80+
device pci 12.0 alias ish off end
81+
device pci 12.6 alias gspi2 off end
82+
#TODO: conflict between gspi3 and ioe_p2sb
83+
#TODO device pci 13.0 alias gspi3 off end
84+
device pci 13.0 alias ioe_p2sb hidden end
85+
device pci 13.1 alias uart3 off end
86+
device pci 13.2 alias pmc2 hidden end
87+
device pci 13.3 alias ioe_shared_sram off end
88+
#TODO: conflict between soc_s_shared_sram and xhci!
89+
#TODO device pci 14.0 alias soc_s_shared_sram off end
90+
device pci 14.0 alias xhci off
91+
chip drivers/usb/acpi
92+
register "type" = "UPC_TYPE_HUB"
93+
device usb 0.0 alias xhci_root_hub off
94+
chip drivers/usb/acpi
95+
device usb 2.0 alias usb2_port1 off end
96+
end
97+
chip drivers/usb/acpi
98+
device usb 2.1 alias usb2_port2 off end
99+
end
100+
chip drivers/usb/acpi
101+
device usb 2.2 alias usb2_port3 off end
102+
end
103+
chip drivers/usb/acpi
104+
device usb 2.3 alias usb2_port4 off end
105+
end
106+
chip drivers/usb/acpi
107+
device usb 2.4 alias usb2_port5 off end
108+
end
109+
chip drivers/usb/acpi
110+
device usb 2.5 alias usb2_port6 off end
111+
end
112+
chip drivers/usb/acpi
113+
device usb 2.6 alias usb2_port7 off end
114+
end
115+
chip drivers/usb/acpi
116+
device usb 2.7 alias usb2_port8 off end
117+
end
118+
chip drivers/usb/acpi
119+
device usb 2.8 alias usb2_port9 off end
120+
end
121+
chip drivers/usb/acpi
122+
device usb 2.9 alias usb2_port10 off end
123+
end
124+
chip drivers/usb/acpi
125+
device usb 3.0 alias usb3_port1 off end
126+
end
127+
chip drivers/usb/acpi
128+
device usb 3.1 alias usb3_port2 off end
129+
end
130+
end
131+
end
132+
end
133+
device pci 14.1 alias usb_otg off end
134+
device pci 14.2 alias pmc_shared_sram off end
135+
device pci 14.3 alias cnvi_wifi off end
136+
device pci 15.0 alias i2c0 off end
137+
device pci 15.1 alias i2c1 off end
138+
device pci 15.2 alias i2c2 off end
139+
device pci 15.3 alias i2c3 off end
140+
device pci 15.4 alias i3c off end
141+
device pci 16.0 alias heci1 on end
142+
device pci 16.1 alias heci2 off end
143+
device pci 16.4 alias heci3 off end
144+
device pci 16.5 alias heci4 off end
145+
device pci 17.0 alias sata off end
146+
device pci 18.0 alias eheci1 off end
147+
device pci 18.1 alias eheci2 off end
148+
device pci 18.2 alias eheci3 off end
149+
device pci 19.0 alias i2c4 off end
150+
device pci 19.1 alias i2c5 off end
151+
device pci 19.2 alias uart2 off end
152+
device pci 1b.0 alias pcie_rp17 off end
153+
device pci 1b.1 alias pcie_rp18 off end
154+
device pci 1b.2 alias pcie_rp19 off end
155+
device pci 1b.3 alias pcie_rp20 off end
156+
device pci 1b.4 alias pcie_rp21 off end
157+
device pci 1b.5 alias pcie_rp22 off end
158+
device pci 1b.6 alias pcie_rp23 off end
159+
device pci 1b.7 alias pcie_rp24 off end
160+
device pci 1c.0 alias pcie_rp1 off end
161+
device pci 1c.1 alias pcie_rp2 off end
162+
device pci 1c.2 alias pcie_rp3 off end
163+
device pci 1c.3 alias pcie_rp4 off end
164+
device pci 1c.4 alias pcie_rp5 off end
165+
device pci 1c.5 alias pcie_rp6 off end
166+
device pci 1c.6 alias pcie_rp7 off end
167+
device pci 1c.7 alias pcie_rp8 off end
168+
device pci 1d.0 alias pcie_rp9 off end
169+
device pci 1d.1 alias pcie_rp10 off end
170+
device pci 1d.2 alias pcie_rp11 off end
171+
device pci 1d.3 alias pcie_rp12 off end
172+
device pci 1d.4 alias pcie_rp13 off end
173+
device pci 1d.5 alias pcie_rp14 off end
174+
device pci 1d.6 alias pcie_rp15 off end
175+
device pci 1d.7 alias pcie_rp16 off end
176+
device pci 1e.0 alias uart0 off end
177+
device pci 1e.1 alias uart1 off end
178+
device pci 1e.2 alias gspi0 off end
179+
device pci 1e.3 alias gspi1 off end
180+
device pci 1f.0 alias soc_espi on end
181+
device pci 1f.1 alias p2sb hidden end
182+
device pci 1f.2 alias pmc hidden end
183+
device pci 1f.3 alias hda off end
184+
device pci 1f.4 alias smbus off end
185+
device pci 1f.5 alias fast_spi on end
186+
device pci 1f.6 alias gbe off end
187+
device pci 1f.7 alias npk off end
188+
end
189+
end

‎src/soc/intel/meteorlake/include/soc/gpio.h‎

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3,11 +3,17 @@
33
#ifndef _SOC_METEORLAKE_GPIO_H_
44
#define _SOC_METEORLAKE_GPIO_H_
55

6+
#if CONFIG(SOC_INTEL_ARROWLAKE_PCH_S)
7+
#include <soc/gpio_defs_pch_s.h>
8+
#define CROS_GPIO_NAME "INTC1084"
9+
#define CROS_GPIO_DEVICE_NAME "INTC1084:00"
10+
#else
611
#include <soc/gpio_defs.h>
7-
#include <intelblocks/gpio.h>
8-
912
#define CROS_GPIO_NAME "INTC1083"
1013
#define CROS_GPIO_DEVICE_NAME "INTC1083:00"
14+
#endif
15+
16+
#include <intelblocks/gpio.h>
1117

1218
/* Enable GPIO community power management configuration */
1319
#define MISCCFG_GPIO_PM_CONFIG_BITS (MISCCFG_GPVNNREQEN | \

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