Skip to content

Commit f1ef484

Browse files
authored
Merge pull request #9150 from miyazakh/update_fsp_v610
Update Renesas FSP version on RA6M4
2 parents b3aa39d + e2fe745 commit f1ef484

File tree

3 files changed

+48
-54
lines changed

3 files changed

+48
-54
lines changed

IDE/Renesas/e2studio/RA6M4/README.md

Lines changed: 47 additions & 41 deletions
Original file line numberDiff line numberDiff line change
@@ -24,29 +24,29 @@ The wolfssl Project Summary is listed below and is relevant for every project.
2424
|Board|EK-RA6M4|
2525
|Device|R7FA6M4AF3CFB|
2626
|Toolchain|GCC ARM Embedded|
27-
|FSP Version|5.4.0|
27+
|FSP Version|6.1.0|
2828

2929
#### Selected software components
3030

3131
|Components|Version|
3232
|:--|:--|
33-
|Board Support Package Common Files|v5.4.0|
34-
|Secure Cryptography Engine on RA6 Protected Mode|v5.4.0|
35-
|I/O Port|v5.4.0|
36-
|Arm CMSIS Version 5 - Core (M)|v6.1.0+fsp.5.4.0|
37-
|RA6M4-EK Board Support Files|v5.4.0|
38-
|Board support package for R7FA6M4AF3CFB|v5.4.0|
39-
|Board support package for RA6M4 - Events|v5.4.0|
40-
|Board support package for RA6M4|v5.4.0|
41-
|Board support package for RA6M4 - FSP Data|v5.4.0|
42-
|FreeRTOS|v10.6.1+fsp.5.4.0|
43-
|FreeRTOS - Memory Management - Heap 4|v10.6.1+fsp.5.4.0|
44-
|r_ether to FreeRTOS+TCP Wrapper|v5.4.0|
45-
|Ethernet|v5.4.0|
46-
|Ethernet PHY|v5.4.0|
47-
|FreeRTOS+TCP|v4.0.0+fsp.5.4.0|
48-
|FreeRTOS - Buffer Allocation 2|v4.0.0+fsp.5.4.0|
49-
|FreeRTOS Port|v5.4.0|
33+
|Board Support Package Common Files|v6.1.0|
34+
|Secure Cryptography Engine on RA6 Protected Mode|v6.1.0|
35+
|I/O Port|v6.1.0|
36+
|Arm CMSIS Version 5 - Core (M)|v6.1.0+fsp.6.1.0|
37+
|RA6M4-EK Board Support Files|v6.1.0|
38+
|Board support package for R7FA6M4AF3CFB|v6.1.0|
39+
|Board support package for RA6M4 - Events|v6.1.0|
40+
|Board support package for RA6M4|v6.1.0|
41+
|Board support package for RA6M4 - FSP Data|v6.1.0|
42+
|FreeRTOS|v11.1.0+fsp.6.1.0|
43+
|FreeRTOS - Memory Management - Heap 4|v11.1.0+fsp.6.1.0|
44+
|r_ether to FreeRTOS+TCP Wrapper|v6.1.0|
45+
|Ethernet|v6.1.0|
46+
|Ethernet PHY|v6.1.0|
47+
|FreeRTOS+TCP|v4.3.3+fsp.6.1.0|
48+
|FreeRTOS - Buffer Allocation 2|v4.3.3+fsp.6.1.0|
49+
|FreeRTOS Port|v6.1.0|
5050

5151
## Setup Steps and Build wolfSSL Library
5252

@@ -58,10 +58,11 @@ The wolfssl Project Summary is listed below and is relevant for every project.
5858

5959
2.) Create a `dummy_library` Static Library.
6060

61-
+ Click File->New->`RA C/C++ Project`.
62-
+ Select `EK-RA6M4` from Drop-down list.
63-
+ Check `Static Library`.
64-
+ Select FreeRTOS from RTOS selection. Click Next.
61+
+ Click File->New->`RA C/C++ Project`. Select `EK-RA6M4` from Drop-down list.
62+
+ Select `Flat(Non-TrustZone) Project`. Click Next.
63+
+ Select `None`. Click Next.
64+
+ Check `Static Library`. Click Next.
65+
+ Select `FreeRTOS` from RTOS selection. Click Next.
6566
+ Check `FreeRTOS minimal - Static Allocation`. Click Finish.
6667
+ Open Smart Configurator by clicking configuration.xml in the project
6768
+ Go to `BSP` tab and increase Heap Size under `RA Common` on Properties page, e.g. 0x1000
@@ -82,7 +83,8 @@ The wolfssl Project Summary is listed below and is relevant for every project.
8283

8384
+ Add `Heap 4` stack to sce_tst_thread from `New Stack` -> `RTOS` -> `FreeRTOS Heap 4`
8485
+ Add `FreeRTOS + TCP` stack to sce_tst_thread from `New Stack` -> `Networking` -> `FreeRTOS+TCP` and set properties
85-
86+
+ Add Ethernet Driver by clicking `Add Ethernet Driver` element and select `New` -> `Ethernet(r_ether)`
87+
+ Increase Heap size of `RA Common`. Go to `BSP` tab and inclease `RA Common` -> `Heap size (bytes)` to 0x2000
8688
|Property|Value|
8789
|:--|:--|
8890
|Network Events call vApplicationIPNetworkEventHook|Disable|
@@ -97,15 +99,15 @@ The wolfssl Project Summary is listed below and is relevant for every project.
9799

98100
4.) Create a 'dummy_application' Renesas RA C Project Using RA Library.
99101

100-
+ Click File->New->`RA C/C++ Project`.
101-
+ Select `EK-RA6M4` from Drop-down list.
102-
+ Check `Executable Using an RA Static Library`.
103-
+ Select FreeRTOS from RTOS selection. Click Finish.
102+
+ Click File->New->`RA C/C++ Project`. Select `EK-RA6M4` from Drop-down list. Click Next.
103+
+ Select `Flat(Non-TrustZone) Project`. Click Next
104+
+ Select `None`. Click Next
105+
+ Check `Executable Using an RA Static Library`. Select FreeRTOS from RTOS selection. Click Finish.
104106
+ Enter `dummy_application` as the project name. Click Next.
105-
+ Under `RA library project`, select `wolfSSL_RA6M4`.
106-
+ Click Finish.
107+
+ Under `RA library project`, select `wolfSSL_RA6M4`. Click Finish.
107108
+ Copy the following folder and file at `dummy_application` to `test_RA6M4`\
108109
script/\
110+
Debug/\
109111
src/sce_tst_thread_entry.c
110112

111113
+ Add `sce_test()` call under /* TODO: add your own code here */ line at sce_tst_thread_entry.c
@@ -131,29 +133,33 @@ The wolfssl Project Summary is listed below and is relevant for every project.
131133
+ To place RTT block specific area, you can add the following line to `fsp.ld`:
132134

133135
```
134-
.bss :
136+
__ram_from_flash$$ :
135137
{
136-
. = ALIGN(4);
137-
__bss_start__ = .;
138-
*(.bss*)
139-
*(COMMON)
140-
KEEP(*(.rtt_block)) /* <-- for SEGGER_RTT control block */
141-
. = ALIGN(4);
142-
__bss_end__ = .;
143-
} > RAM
138+
__ram_from_flash$$Base = .;__ram_from_flash$$Load = LOADADDR(__ram_from_flash$$);
139+
/* section.ram.from_flash */
140+
*(.ram_from_flash)
141+
/* section.ram.code_from_flash */
142+
*(.txt.rtt_block) /* <-- for SEGGER_RTT control block */
143+
*(.ram_code_from_flash)
144+
*(.data*)
145+
*(vtable)
146+
__ram_from_flash$$Limit = .;
147+
}> RAM AT > FLASH
144148
```
145149
Also, adding the following line to `SEGGER_RTT.c`:
146150

147151
```
148-
SEGGER_RTT_CB _SEGGER_RTT __attribute__((section(".rtt_block")));
152+
SEGGER_RTT_CB _SEGGER_RTT __attribute__((section(".txt.rtt_block")));
149153
```
150154

151155
As the result, you can find the following similar line in the map file.
152156
e.g.
153157
[test_RA6M4.map]
154158
```
155-
.rtt_block 0x20023648 0xa8 ./src/SEGGER_RTT/SEGGER_RTT.o
156-
0x20023648 _SEGGER_RTT
159+
*(.txt.rtt_block)
160+
.txt.rtt_block
161+
0x20000000 0xa8 ./src/SEGGER_RTT/SEGGER_RTT.o
162+
0x20000000 _SEGGER_RTT
157163
````
158164
you can specify "RTT control block" to 0x20023648 by Address
159165
OR

IDE/Renesas/e2studio/RA6M4/test/.cproject

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -87,6 +87,7 @@
8787
<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.std.1084991557" name="Language standard" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.std" useByScannerDiscovery="true" value="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.std.c99" valueType="enumerated"/>
8888
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.include.paths.2023903025" name="Include paths (-I)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.include.paths" useByScannerDiscovery="true" valueType="includePath">
8989
<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/key_data}&quot;"/>
90+
<listOptionValue builtIn="false" value="&quot;${workspace_loc:/wolfSSL_RA6M4/Debug}&quot;"/>
9091
<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/../common&quot;"/>
9192
<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/../../../../../&quot;"/>
9293
<listOptionValue builtIn="false" value="&quot;${workspace_loc:/wolfSSL_RA6M4/src}&quot;"/>

IDE/Renesas/e2studio/RA6M4/test/src/test_main.c

Lines changed: 0 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -50,19 +50,6 @@ void abort(void);
5050
int sce_crypt_test();
5151
#endif
5252

53-
void R_BSP_WarmStart(bsp_warm_start_event_t event);
54-
55-
/* the function is called just before main() to set up pins */
56-
/* this needs to be called to setup IO Port */
57-
void R_BSP_WarmStart (bsp_warm_start_event_t event)
58-
{
59-
60-
if (BSP_WARM_START_POST_C == event) {
61-
/* C runtime environment and system clocks are setup. */
62-
/* Configure pins. */
63-
R_IOPORT_Open(&g_ioport_ctrl, g_ioport.p_cfg);
64-
}
65-
}
6653

6754
#if defined(TLS_CLIENT)
6855

0 commit comments

Comments
 (0)