Tcp server fix

src/shim/umq/dbg_cmd.h

@@ -11,7 +11,7 @@ extern "C"
 
 #define DBG_PKT_SUCCESS (1)
 #define DBG_PKT_EXIT (2)
-#define DBG_PKT_INVALID (2)
+#define DBG_PKT_INVALID (3)
 
 enum dbg_packet_opcode
 {            

src/shim/umq/dbg_hwq.cpp

@@ -33,6 +33,7 @@ dbg_hwq_umq(const device& dev)
 
   m_dbg_umq_pkt->xrt_header.common_header.type = HOST_QUEUE_PACKET_TYPE_INVALID;
   m_dbg_umq_hdr->capacity = 1;
+  m_dbg_umq_hdr->data_address = m_dbg_umq_bo->paddr() + header_sz;
 
   set_use_flag();
   shim_debug("Created DBG UMQ HW queue");
@@ -50,7 +51,6 @@ issue_exit_cmd()
 {
   auto hdr = &m_dbg_umq_pkt->xrt_header;
   // always case 1
-  m_dbg_umq_hdr->write_index++;
   auto ehp = &m_dbg_umq_pkt->xrt_header;
   ehp->common_header.opcode = DBG_CMD_EXIT;
   ehp->common_header.count = 0;
@@ -65,7 +65,6 @@ issue_rw_cmd(struct rw_mem &data, uint16_t opcode)
 { 
   auto hdr = &m_dbg_umq_pkt->xrt_header;
   // always case 1
-  m_dbg_umq_hdr->write_index++;
   auto ehp = &m_dbg_umq_pkt->xrt_header;
   ehp->common_header.opcode = opcode;
   ehp->common_header.count = sizeof (struct rw_mem);
@@ -104,16 +103,23 @@ submit()
 {
   *m_dbg_umq_comp_ptr = 0;
 
-  /* Issue mfence instruction to make sure all writes to the slot before is done */
-  std::atomic_thread_fence(std::memory_order::memory_order_seq_cst);
   m_dbg_umq_pkt->xrt_header.common_header.type =
     HOST_QUEUE_PACKET_TYPE_VENDOR_SPECIFIC;
+  /* Issue mfence instruction to make sure all writes to the slot before is done */
+  std::atomic_thread_fence(std::memory_order::memory_order_seq_cst);
+  m_dbg_umq_hdr->write_index++;
 
-  shim_debug("dbg umq: submit cmd");
+  shim_debug("dbg umq: submit cmd widx: %ld ridx: %ld",
+    m_dbg_umq_hdr->write_index,
+    m_dbg_umq_hdr->read_index);
+  shim_debug("dbg umq: cmd opcode: %d count: %d",
+    m_dbg_umq_pkt->xrt_header.common_header.opcode,
+    m_dbg_umq_pkt->xrt_header.common_header.count);
 
   while (1)
   {
-    if (*m_dbg_umq_comp_ptr)
+    if (*m_dbg_umq_comp_ptr &&
+        m_dbg_umq_hdr->write_index == m_dbg_umq_hdr->read_index)
     {
       return (*m_dbg_umq_comp_ptr);
     }

src/shim/umq/hwctx.h

@@ -24,7 +24,6 @@ class hwctx_umq : public hwctx {
 private:
   const pdev& m_pdev;
   uint32_t m_col_cnt = 0;
-
   std::unique_ptr<tcp_server> m_tcp_server;
   std::thread m_thread_;
 

src/shim/umq/tcp_server.cpp

@@ -20,6 +20,13 @@ m_aie_attached(false), m_dbg_umq(dev), m_def_size(16), m_pdev(dev.get_pdev())
   m_data_buf = m_data_bo->vaddr();
   m_data_paddr = m_data_bo->paddr();
   m_srv_stop = 0;
+
+  // issue ioctl to attach the dbg hsa queue
+  std::map<uint32_t, size_t> buf_sizes;
+  buf_sizes[0] = 32; //we don't care size
+
+  m_dbg_umq.get_dbg_umq_bo()->config(m_hwctx, buf_sizes);
+  shim_debug("TCP server ioctl: debugger attach\n");
 }
 
 tcp_server::
@@ -287,13 +294,15 @@ buffer_extend(size_t new_size)
 uint32_t
 tcp_server::
 handle_attach(uint32_t uc_index)
-{ 
+{
+#if 0	
   // issue ioctl to attach the dbg hsa queue
   std::map<uint32_t, size_t> buf_sizes;
   buf_sizes[uc_index] = 0; //we don't care size
 
   m_dbg_umq.get_dbg_umq_bo()->config(m_hwctx, buf_sizes);
   shim_debug("TCP server ioctl: debugger attach\n");
+#endif
 
   m_aie_attached = true;
   return AIE_DBG_SUCCESS;
@@ -305,7 +314,7 @@ handle_detach()
 {
   m_dbg_umq.issue_exit_cmd();
   // issue ioctl to detach the dbg hsa queue
-  m_dbg_umq.get_dbg_umq_bo()->unconfig(m_hwctx);
+  //m_dbg_umq.get_dbg_umq_bo()->unconfig(m_hwctx);
 
   m_aie_attached = false;
   shim_debug("TCP server ioctl: debugger queue detach\n");