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Enable ppi and gpiote suport
Updated buffered_uarte for new ppi support Adding gpiote examples Signed-off-by: Dmitry Tarnyagin <[email protected]> Signed-off-by: Vegard Eriksen <[email protected]> Signed-off-by: Tyson Lawrence <[email protected]>
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11 files changed

+734
-103
lines changed

11 files changed

+734
-103
lines changed

‎embassy-nrf/src/buffered_uarte.rs‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -121,7 +121,7 @@ impl<U: UarteInstance> interrupt::typelevel::Handler<U::Interrupt> for Interrupt
121121

122122
// Enable endrx -> startrx PPI channel.
123123
// From this point on, if endrx happens, startrx is automatically fired.
124-
ppi::regs().chenset().write(|w| w.0 = 1 << chn);
124+
ppi::regs(()).chenset().write(|w| w.0 = 1 << chn);
125125

126126
// It is possible that endrx happened BEFORE enabling the PPI. In this case
127127
// the PPI channel doesn't trigger, and we'd hang. We have to detect this
@@ -145,15 +145,15 @@ impl<U: UarteInstance> interrupt::typelevel::Handler<U::Interrupt> for Interrupt
145145

146146
// Check if the PPI channel is still enabled. The PPI channel disables itself
147147
// when it fires, so if it's still enabled it hasn't fired.
148-
let ppi_ch_enabled = ppi::regs().chen().read().ch(chn as _);
148+
let ppi_ch_enabled = ppi::regs(()).chen().read().ch(chn as _);
149149

150150
// if rxend happened, and the ppi channel hasn't fired yet, the rxend got missed.
151151
// this condition also naturally matches if `!started`, needed to kickstart the DMA.
152152
if rxend_happened && ppi_ch_enabled {
153153
//trace!("manually starting.");
154154

155155
// disable the ppi ch, it's of no use anymore.
156-
ppi::regs().chenclr().write(|w| w.set_ch(chn as _, true));
156+
ppi::regs(()).chenclr().write(|w| w.set_ch(chn as _, true));
157157

158158
// manually start
159159
r.tasks_startrx().write_value(1);

‎embassy-nrf/src/chips/nrf54l15_app.rs‎

Lines changed: 122 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -206,14 +206,27 @@ pub const EASY_DMA_SIZE: usize = (1 << 16) - 1;
206206
pub const FLASH_SIZE: usize = 1536 * 1024;
207207

208208
embassy_hal_internal::peripherals! {
209-
// GPIO port 0
209+
// GPIOTE
210+
GPIOTE20_CH0,
211+
GPIOTE20_CH1,
212+
GPIOTE20_CH2,
213+
GPIOTE20_CH3,
214+
GPIOTE20_CH4,
215+
GPIOTE20_CH5,
216+
GPIOTE20_CH6,
217+
GPIOTE20_CH7,
218+
219+
GPIOTE30_CH0,
220+
GPIOTE30_CH1,
221+
GPIOTE30_CH2,
222+
GPIOTE30_CH3,
223+
224+
// GPIO port 2
210225
P0_00,
211226
P0_01,
212227
P0_02,
213228
P0_03,
214229
P0_04,
215-
P0_05,
216-
P0_06,
217230

218231
// GPIO port 1
219232
P1_00,
@@ -231,11 +244,10 @@ embassy_hal_internal::peripherals! {
231244
P1_12,
232245
P1_13,
233246
P1_14,
247+
// QFN48 (QFAA) package only
234248
P1_15,
235-
P1_16,
236-
237249

238-
// GPIO port 2
250+
// GPIO port 0
239251
P2_00,
240252
P2_01,
241253
P2_02,
@@ -248,6 +260,56 @@ embassy_hal_internal::peripherals! {
248260
P2_09,
249261
P2_10,
250262

263+
// PPI CHs
264+
PPI00_CH0,
265+
PPI00_CH1,
266+
PPI00_CH2,
267+
PPI00_CH3,
268+
PPI00_CH4,
269+
PPI00_CH5,
270+
PPI00_CH6,
271+
PPI00_CH7,
272+
273+
// DPPI10 channels are dedicated to the radio. Do not implement.
274+
275+
PPI20_CH0,
276+
PPI20_CH1,
277+
PPI20_CH2,
278+
PPI20_CH3,
279+
PPI20_CH4,
280+
PPI20_CH5,
281+
PPI20_CH6,
282+
PPI20_CH7,
283+
PPI20_CH8,
284+
PPI20_CH9,
285+
PPI20_CH10,
286+
PPI20_CH11,
287+
PPI20_CH12,
288+
PPI20_CH13,
289+
PPI20_CH14,
290+
PPI20_CH15,
291+
292+
PPI30_CH0,
293+
PPI30_CH1,
294+
PPI30_CH2,
295+
PPI30_CH3,
296+
297+
// PPI GROUPs
298+
PPI00_GROUP0,
299+
PPI00_GROUP1,
300+
301+
// DPPI10 groups are dedicated to the radio. Do not implement.
302+
303+
PPI20_GROUP0,
304+
PPI20_GROUP1,
305+
PPI20_GROUP2,
306+
PPI20_GROUP3,
307+
PPI20_GROUP4,
308+
PPI20_GROUP5,
309+
310+
PPI30_GROUP0,
311+
PPI30_GROUP1,
312+
251313
#[cfg(feature = "_s")]
252314
// RRAMC
253315
RRAMC,
@@ -269,8 +331,6 @@ impl_pin!(P0_01, 0, 1);
269331
impl_pin!(P0_02, 0, 2);
270332
impl_pin!(P0_03, 0, 3);
271333
impl_pin!(P0_04, 0, 4);
272-
impl_pin!(P0_05, 0, 5);
273-
impl_pin!(P0_06, 0, 6);
274334

275335
impl_pin!(P1_00, 1, 0);
276336
impl_pin!(P1_01, 1, 1);
@@ -288,7 +348,6 @@ impl_pin!(P1_12, 1, 12);
288348
impl_pin!(P1_13, 1, 13);
289349
impl_pin!(P1_14, 1, 14);
290350
impl_pin!(P1_15, 1, 15);
291-
impl_pin!(P1_16, 1, 16);
292351

293352
impl_pin!(P2_00, 2, 0);
294353
impl_pin!(P2_01, 2, 1);
@@ -302,6 +361,60 @@ impl_pin!(P2_08, 2, 8);
302361
impl_pin!(P2_09, 2, 9);
303362
impl_pin!(P2_10, 2, 10);
304363

364+
// DPPI00 channels
365+
impl_ppi_channel!(PPI00_CH0, pac::DPPIC00, 0 => configurable);
366+
impl_ppi_channel!(PPI00_CH1, pac::DPPIC00, 1 => configurable);
367+
impl_ppi_channel!(PPI00_CH2, pac::DPPIC00, 2 => configurable);
368+
impl_ppi_channel!(PPI00_CH3, pac::DPPIC00, 3 => configurable);
369+
impl_ppi_channel!(PPI00_CH4, pac::DPPIC00, 4 => configurable);
370+
impl_ppi_channel!(PPI00_CH5, pac::DPPIC00, 5 => configurable);
371+
impl_ppi_channel!(PPI00_CH6, pac::DPPIC00, 6 => configurable);
372+
impl_ppi_channel!(PPI00_CH7, pac::DPPIC00, 7 => configurable);
373+
374+
// DPPI10 channels are dedicated to the radio. Do not implement.
375+
376+
// DPPI20 channels
377+
impl_ppi_channel!(PPI20_CH0, pac::DPPIC20, 0 => configurable);
378+
impl_ppi_channel!(PPI20_CH1, pac::DPPIC20, 1 => configurable);
379+
impl_ppi_channel!(PPI20_CH2, pac::DPPIC20, 2 => configurable);
380+
impl_ppi_channel!(PPI20_CH3, pac::DPPIC20, 3 => configurable);
381+
impl_ppi_channel!(PPI20_CH4, pac::DPPIC20, 4 => configurable);
382+
impl_ppi_channel!(PPI20_CH5, pac::DPPIC20, 5 => configurable);
383+
impl_ppi_channel!(PPI20_CH6, pac::DPPIC20, 6 => configurable);
384+
impl_ppi_channel!(PPI20_CH7, pac::DPPIC20, 7 => configurable);
385+
impl_ppi_channel!(PPI20_CH8, pac::DPPIC20, 8 => configurable);
386+
impl_ppi_channel!(PPI20_CH9, pac::DPPIC20, 9 => configurable);
387+
impl_ppi_channel!(PPI20_CH10, pac::DPPIC20, 10 => configurable);
388+
impl_ppi_channel!(PPI20_CH11, pac::DPPIC20, 11 => configurable);
389+
impl_ppi_channel!(PPI20_CH12, pac::DPPIC20, 12 => configurable);
390+
impl_ppi_channel!(PPI20_CH13, pac::DPPIC20, 13 => configurable);
391+
impl_ppi_channel!(PPI20_CH14, pac::DPPIC20, 14 => configurable);
392+
impl_ppi_channel!(PPI20_CH15, pac::DPPIC20, 15 => configurable);
393+
394+
// DPPI30 channels
395+
impl_ppi_channel!(PPI30_CH0, pac::DPPIC30, 0 => configurable);
396+
impl_ppi_channel!(PPI30_CH1, pac::DPPIC30, 1 => configurable);
397+
impl_ppi_channel!(PPI30_CH2, pac::DPPIC30, 2 => configurable);
398+
impl_ppi_channel!(PPI30_CH3, pac::DPPIC30, 3 => configurable);
399+
400+
// DPPI00 groups
401+
impl_ppi_group!(PPI00_GROUP0, pac::DPPIC00, 0);
402+
impl_ppi_group!(PPI00_GROUP1, pac::DPPIC00, 1);
403+
404+
// DPPI10 groups are dedicated to the radio. Do not implement.
405+
406+
// DPPI20 groups
407+
impl_ppi_group!(PPI20_GROUP0, pac::DPPIC20, 0);
408+
impl_ppi_group!(PPI20_GROUP1, pac::DPPIC20, 1);
409+
impl_ppi_group!(PPI20_GROUP2, pac::DPPIC20, 2);
410+
impl_ppi_group!(PPI20_GROUP3, pac::DPPIC20, 3);
411+
impl_ppi_group!(PPI20_GROUP4, pac::DPPIC20, 4);
412+
impl_ppi_group!(PPI20_GROUP5, pac::DPPIC20, 5);
413+
414+
// DPPI30 groups
415+
impl_ppi_group!(PPI30_GROUP0, pac::DPPIC30, 0);
416+
impl_ppi_group!(PPI30_GROUP1, pac::DPPIC30, 1);
417+
305418
#[cfg(feature = "_ns")]
306419
impl_wdt!(WDT, WDT31, WDT31, 0);
307420
#[cfg(feature = "_s")]

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