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developer documentation
openvizsla edited this page Jul 28, 2013
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OpenVizsla is mainly four chips connected together.
- FTDI FT2232H High-Speed USB FIFO (datasheet)
- Xilinx Spartan 6 LX FPGA (datasheet)
- Micron MT48LC16M16A2P-xx SDRAM (datasheet)
- SMSC USB3343 ULPI PHY (datasheet)
- Communications with the FT2232H over USB uses a proprietary USB protocol which has been implemented in fastftdi.c (and elsewhere, e.g. libftdi)
- The FPGA is configured using Slave SelectMAP as described in Xilinx UG380 and XAPP502
- Communications with the ULPI PHY are described in the ULPI and UTMI+ specifications