cpu/i960: store IRQ line states, immediately return if unchanged

src/devices/cpu/i960/i960.cpp

@@ -2218,6 +2218,11 @@ void i960_cpu_device::execute_run()
 
 void i960_cpu_device::execute_set_input(int irqline, int state)
 {
+	if (m_irq_line_state[irqline] == state)
+		return;
+
+	m_irq_line_state[irqline] = state;
+
 	int int_tab =  m_program.read_dword(m_PRCB+20);    // interrupt table
 	int cpu_pri = (m_PC>>16)&0x1f;
 	int vector =0;
@@ -2311,6 +2316,7 @@ void i960_cpu_device::device_start()
 	save_item(NAME(m_stall_state.t1));
 	save_item(NAME(m_stall_state.t2));
 	save_item(NAME(m_stall_state.burst_mode));
+	save_item(NAME(m_irq_line_state));
 
 
 	state_add( I960_SAT,  "sat", m_SAT).formatstr("%08X");
@@ -2360,6 +2366,7 @@ void i960_cpu_device::device_start()
 	m_immediate_pri = 0;
 	memset(m_rcache_frame_addr, 0, sizeof(m_rcache_frame_addr));
 	memset(m_fp, 0, sizeof(m_fp));
+	memset(m_irq_line_state, CLEAR_LINE, sizeof(m_irq_line_state));
 	m_PIP = 0;
 
 	set_icountptr(m_icount);

src/devices/cpu/i960/i960.h

@@ -132,6 +132,8 @@ class i960_cpu_device :  public cpu_device
 	int m_immediate_vector;
 	int  m_immediate_pri;
 
+	int8_t m_irq_line_state[4];
+
 	memory_access<32, 2, 0, ENDIANNESS_LITTLE>::cache m_cache;
 	memory_access<32, 2, 0, ENDIANNESS_LITTLE>::specific m_program;
 

src/mame/namco/namcofl.cpp

@@ -353,6 +353,12 @@ void namcofl_state::sysreg_w(offs_t offset, uint32_t data, uint32_t mem_mask)
 		// 1: ROM at 00000000, RAM at 10000000
 		m_mainbank.select(data & 1);
 	}
+	else if (offset >= 0x10 && offset <= 0x13)	// clear i960 IRQ line
+	{
+		// data value doesn't seem to matter
+		const int irq_type[4] = { I960_IRQ0, I960_IRQ1, I960_IRQ2, I960_IRQ3 };
+		m_maincpu->set_input_line(irq_type[offset & 3], CLEAR_LINE);
+	}
 }
 
 // FIXME: remove this trampoline once the IRQ is moved into the actual device
@@ -650,6 +656,12 @@ void namcofl_state::machine_reset()
 
 	std::fill_n(&m_workram[0], m_workram.bytes() / 4, 0);
 	m_mainbank.select(1);
+
+	const int irq_type[] = { I960_IRQ0, I960_IRQ1, I960_IRQ2, I960_IRQ3 };
+	for (auto irq : irq_type)
+	{
+		m_maincpu->set_input_line(irq, CLEAR_LINE);
+	}
 }
 
 

src/mame/sega/model2.cpp

@@ -269,6 +269,12 @@ void model2_state::machine_reset()
 	m_copro_fifo_out->clear();
 	m_geo_write_start_address = 0;
 	m_geo_read_start_address = 0;
+
+	const int irq_type[] = { I960_IRQ0, I960_IRQ1, I960_IRQ2, I960_IRQ3 };
+	for (auto irq : irq_type)
+	{
+		m_maincpu->set_input_line(irq, CLEAR_LINE);
+	}
 }
 
 void model2_state::reset_model2_scsp()